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Observer
Observer
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Registered: ‎08-04-2016

Integrating a VHDL IP (Only VHDL code) to an already existing comprehensive XMP on PlanAhead

I am trying to add my VHDL code directly to a system that I have from a bigger project, but after I add the source VHDL to PlanAhead, I get stuck I and I dont know how to add connect the ports to the already existing arm_system.xmp. The core doesn't appear in the Xilinx Platform Studio SDK when I open it to connect the ports.

I would really appreciate any resources on doing that.

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