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Participant saurabhsk
Participant
3,066 Views
Registered: ‎02-17-2009

Issue with 12.1 while DDR generation.

Hi,

 

  I am having generated DDR model from ISE 11.4 release . Now i want to re-generate it from ISE 12.1.

 

I am running the command :

 

<XST INSTALLATION>/bin/lin/coregen -b mig_33.xco

 

But it is giving error like :

 

 

WARNING:sim:436 - The selected IP (MIG,3.3) is incompatible with the currently
   selected part.
WARNING:encore:182 - Invalid project options. Family not set.
WARNING:encore:181 - Invalid project options. Device not set.
WARNING:encore:183 - Invalid project options. Package not set.
WARNING:encore:184 - Invalid project options. Speed grade not set.
WARNING:encore:175 - Project options (family='', device='', package='', speed
   grade='') are inconsistent, unavailable or incorrectly entered.

 

WARNING:sim:436 - The selected IP (MIG,3.3) is incompatible with the currently   selected part.WARNING:encore:182 - Invalid project options. Family not set.WARNING:encore:181 - Invalid project options. Device not set.WARNING:encore:183 - Invalid project options. Package not set.WARNING:encore:184 - Invalid project options. Speed grade not set.WARNING:encore:175 - Project options (family='', device='', package='', speed   grade='') are inconsistent, unavailable or incorrectly entered.

 

How to resolve this problem.

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1 Reply
Xilinx Employee
Xilinx Employee
3,057 Views
Registered: ‎12-17-2007

Re: Issue with 12.1 while DDR generation.

Please see this post:

 

http://forums.xilinx.com/t5/Design-Entry/Coregen-batch-mode-fails-in-12-1/td-p/69216

 

A change was made for ISE 12.1 where CoreGen batch mode requires a CoreGen project.  Just add the line referenced in the other post to your existing .XCO and you should be fine.

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