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study3mouth
Visitor
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Registered: ‎02-23-2009

LogiBLOX

How to launch LogiBLOX from ISE 10.1?

I can not find it on menu items or toolbar buttons.

 

 

Also, I can not find lbgui at C:\Xilinx.

 

ITA

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bassman59
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Historian
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Registered: ‎02-25-2008


study3mouth wrote:

How to launch LogiBLOX from ISE 10.1?

I can not find it on menu items or toolbar buttons.

 

ITA

Wow! Talk about ancient history. I think Logiblox went away when Xilinx shifted from XACT to the ISE stuff -- like in 1997.

 

-a

----------------------------Yes, I do this for a living.
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study3mouth
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Registered: ‎02-23-2009

So, how to do the function LogiBLOX does?

 

For example, create high-level modules, such as counters, shift registers, and multiplexers.

 

TIA

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bassman59
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Registered: ‎02-25-2008


study3mouth wrote:

So, how to do the function LogiBLOX does?

 

For example, create high-level modules, such as counters, shift registers, and multiplexers.

 

TIA


It's easy enough to describe counters, shift registers and multiplexers in VHDL.

 

The "replacement" for the LogiBLOX is something called LogiCORE. 

 

But seriously -- there's really no reason at all to use a "core" to describe low-level modules such as counters, shift registers and multiplexers.

 

-a

----------------------------Yes, I do this for a living.
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study3mouth
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Registered: ‎02-23-2009

Thanks for your answer.

To try to describe counters by VHDL, I just don't know how to write the content of it.

 

For example, I have an old sch file and there is a counter in it. I just know its INs and OUTs(that were used) as follows,

 

ASYNC_CTRL

CLK_EN

CLOCK

TERM_CNT

 

 

How do I write its function by VHDL.

 

Please give me some hints or samples.

 

TIA. 

 

 

>It's easy enough to describe counters, shift registers and multiplexers in VHDL.

 

>The "replacement" for the LogiBLOX is something called LogiCORE. 

 

>But seriously -- there's really no reason at all to use a "core" to describe low-level modules such as counters, shift >registers and multiplexers.

 

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study3mouth
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Registered: ‎02-23-2009

In other word, how can I create a COUNTER Module by VHDL if I only know its INs and OUTs as follows,

    CLK_EN: IN std_logic;
    CLOCK: IN std_logic;
    ASYNC_CTRL: IN std_logic;
    Q_OUT: OUT std_logic_vector(? DOWNTO 0);
    TERM_CNT: OUT std_logic);

That means that I don't know its logic inside?

 

TIA

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mcgett
Xilinx Employee
Xilinx Employee
11,008 Views
Registered: ‎01-03-2008

Turning this around, why would you use a module if you didn't know what was inside?  If you don't know what the pin functions are how would you know how to connect them.

 

As on of the other posters mentioned, a COUNTER is simple and is easy to describe, it just increments by 1 every clock cycle that it is enabled.

 

CLK_EN     = Clock enable input, the counter only increments when this is active

CLOCK      = Clock input for the counter

ASYNC_CTRL = Asynchronous control to resets counter depending on how the module was built (should be converted to synchronous)

Q_OUT      = The counter output bus

TERM_CNT   = There might have been an option to only count to a specific value and then stop, this would indicate that the terminal count had been reached

 

A junior VHDL designer should be able to replicate the module in less than 15 minutes.  An experience VHDL designer in less than 5 minutes. Most of my time would be spent on trying to remember which VHDL library I needed to include that had a std_logic_vector '+' function or the appropriate conversion function from unsigned.  

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
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study3mouth
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Registered: ‎02-23-2009

Well, please see below.

 

>why would you use a module if you didn't know what was inside?

I just need to re-write (by VHDL or SCH under ISE10) the same logic a old *sch showed.

Beside, as document says, It seems to me that I don't need to know the inside I should be able to design a COUNTER module by LogiBLOX. But if using VHDL, I guess I have to know the inside.

 

 

>If you don't know what the pin functions are how would you know how to connect them.

The old *sch has told me how to connect it.

 

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nposozvezdie
Observer
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Registered: ‎11-30-2010

> ... ancient history.

 

It is not dead. Logiblox still actively used by us in Foundation 4.2i to create Spartan and Spartan-2 designs. Foundation suite was oficially buyed by us many years ago (at this moment it was 2.xi version). After final uprgade to version 4.2, Logiblox line become disabled in menu, but we copy and modify exist blocks in shematic.

 

Periodically we try to upgrade to ISE (webpack?) but always get big fail in trying to setup black background and tunable size fonts in shematic editor, as it was in XF4.2i. It is essential (a*) for us. But even modern Webpack version 10 still not has tuneable font size in shematic. We get only http://www.xilinx.com/support/answers/19737.htm, where, instead of solve problem as it was crystally done in XF4.2i (small, mid and big font size all was user-tuneable and design-wide), we get only confusing "manual" how to not increase font but 90% time spent to zoom in and out... :(

 

More excessive and deep trying we do when read a excellent news about Linux native version of Xilinx tools. It is essential (b*) for us to not use Windows at all. Sadly XF4.2i absolutely can't run under Linux/Ubuntu, but if it do, it become almost all we need. (in any case, no need to live jtag programming or any promfmtr/impact; only we need is to genegate .bit or .hex file).

 

Unfortunately, no one version of Xilinx design suite can give (a*) and (b*) at same time. But i prefer save my eyes, instead of spent days in reading small fonts and panning in shematic. So i use (a*) i.e. XF4.2i tools, and Logiblox of course, even in year 2010.

 

Thanks for reading. Sorry if it's an offtopic.

 

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awillen
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Registered: ‎11-29-2007

Wow! You're using an ancient version of ISE because the newer ones don't allow you to set the background to black or increase the font size? Please don't tell me you're still developing new designs (for old devices) using this method?

 

Have you ever thought about using a screen magnifier (http://en.wikipedia.org/wiki/Screen_magnifier)? It magnifies the portion of the screen under your mouse pointer (such software exists for Linux as well), so that you can read small fonts.

 

Furthermore, you should invest a little time to learn VHDL or Verilog (all the cool kids do it these days). You can even mix Verilog/VHDL modules with schematic modules, i.e. use one of them within the other one.

 

 

Adrian



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bassman59
Historian
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Registered: ‎02-25-2008

 


@nposozvezdie wrote:

> ... ancient history.

 

It is not dead. Logiblox still actively used by us in Foundation 4.2i to create Spartan and Spartan-2 designs. Foundation suite was oficially buyed by us many years ago (at this moment it was 2.xi version). After final uprgade to version 4.2, Logiblox line become disabled in menu, but we copy and modify exist blocks in shematic.

 

Periodically we try to upgrade to ISE (webpack?) but always get big fail in trying to setup black background and tunable size fonts in shematic editor, as it was in XF4.2i. It is essential (a*) for us. But even modern Webpack version 10 still not has tuneable font size in shematic. We get only http://www.xilinx.com/support/answers/19737.htm, where, instead of solve problem as it was crystally done in XF4.2i (small, mid and big font size all was user-tuneable and design-wide), we get only confusing "manual" how to not increase font but 90% time spent to zoom in and out... :(

 

More excessive and deep trying we do when read a excellent news about Linux native version of Xilinx tools. It is essential (b*) for us to not use Windows at all. Sadly XF4.2i absolutely can't run under Linux/Ubuntu, but if it do, it become almost all we need. (in any case, no need to live jtag programming or any promfmtr/impact; only we need is to genegate .bit or .hex file).

 

Unfortunately, no one version of Xilinx design suite can give (a*) and (b*) at same time. But i prefer save my eyes, instead of spent days in reading small fonts and panning in shematic. So i use (a*) i.e. XF4.2i tools, and Logiblox of course, even in year 2010.

 

Thanks for reading. Sorry if it's an offtopic.

 


This is the funniest thing I've ever read on an engineering forum!

 

----------------------------Yes, I do this for a living.
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nposozvezdie
Observer
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Registered: ‎11-30-2010

> You're using an ancient version of ISE because the newer ones don't allow you to set the background to black or increase the font size?

 

Sadly, yes.

 

1. Font size increasing can't be done by known methods except deep learning and fixing of font rendering subsystem in my OS, but i'm not a geek and don't know C (Ubuntu written in C).

Wrong font size is small and easy to fix (by Webpack developers) disadvantage, but it totally blocks me from fast design flow. I know about screen magnifiers (it exist in my OS). But problem is not a simple small text - it can be solved by native way, Ctrl+Mouse wheel in Webpack.

The problem is text size compared to symbols size.

I must always zooming in and out when i draw shematic. It's a nightmare (or, at least, it consumes main part of total design time).

Here other people says about this, sorry for repeat the link: Xilinx answers

Here is ideal picture taken from XF4.2i (please see attachment). No need to zooming at all when design.

 

2. White background burn my eyes. Fortunately it already can be solved in 21th century:

a) Use native way - most CADs including Webpack, have tuneable shematic colors. But be careful! In other frames suddenly appears, backrgound can't be turned to black even when i setup system-wide black background in my OS.

b) Use some 2N2222s and op amps to invert R,G,B analog signals in VGA display cord. This way i fight against dummy software when i work in Windows some years ago (but high display resolutions has problems).

c) Use native screen invert function built-in in my OS.

 

> Please don't tell me you're still developing new designs (for old devices) using this method?

Unfortunately, yes. In attachment is example screenshot of my open-source control block for vinyl player, done in 2009. XCF05VQ100 used. ...Yes, i know, it's not fully synchronous, please dont bite me for this;)

 

Wrong font size in modern webpacks is maybe most bad thing. I maybe can tolerate with absence of Logiblox etc..., but not with constantly zooming.

 

> Furthermore, you should invest a little time to learn VHDL or Verilog

 

Sure, i must, and i try. I go to 'Language templates' toolbar button. Tons of non-complete code pieces appears... But no one, even small one, full and ready-to-use example of simple counter or mux... First meet with VHDL was negative... maybe buyed versions of ISEs includes example templates and has other improvements?

 

---

 

> This is the funniest thing I've ever read on an engineering forum!

 

I'm glad that you will not be bored reading this)

But i'm not laugh, i really actively search ways to fix font size problem.

 

vinyl.gif
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eteam00
Professor
Professor
7,187 Views
Registered: ‎07-21-2009

You are a prime candidate for schematic to Verilog design conversion.  Eliminating schematics would eliminate your roadblocks.  How big is the design?  How many schematic pages?

 

Your company, does it standardise on VHDL or Verilog?  Either will work, of course, but Verilog is easier to learn by a beginner, and is more forgiving.  This is your opportunity to learn either Verilog or VHDL.  Do it now, rather than later.

 

- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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awillen
Mentor
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7,181 Views
Registered: ‎11-29-2007

 


I know about screen magnifiers (it exist in my OS). But problem is not a simple small text - it can be solved by native way, Ctrl+Mouse wheel in Webpack.

The problem is text size compared to symbols size.


Why can't you use the screen magnifier to magnify the port names? Simply hover with the mouse over the symbol you want to connect to, and that portion of the screen will be magnified, so that you can read the text. No zooming required.

 

 


2. White background burn my eyes. Fortunately it already can be solved in 21th century:

a) Use native way - most CADs including Webpack, have tuneable shematic colors. But be careful! In other frames suddenly appears, backrgound can't be turned to black even when i setup system-wide black background in my OS.

b) Use some 2N2222s and op amps to invert R,G,B analog signals in VGA display cord. This way i fight against dummy software when i work in Windows some years ago (but high display resolutions has problems).

c) Use native screen invert function built-in in my OS.


Have you tried turning the brightness of your screen down? My monitor provides a quick-select for different levels of brightness, which is very convenient when reading for a longer time.

 

 

 


> Furthermore, you should invest a little time to learn VHDL or Verilog

 

Sure, i must, and i try. I go to 'Language templates' toolbar button. Tons of non-complete code pieces appears... But no one, even small one, full and ready-to-use example of simple counter or mux... First meet with VHDL was negative... maybe buyed versions of ISEs includes example templates and has other improvements?


 

Erm ... you've completely misunderstood the way how HDLs are used. There is no example of a counter, because it is as simple as that:

 

always @(posedge clk)
    counter <= counter + 1;

 Furthermore, you're not supposed to learn Verilog or VHDL from the language templates! They serve as reminders for syntax, as templates for FPGA primitive instantiation, and as examples for simple constructs. They are not stand-alone logic modules because you're not supposed to click&drag to build your design the way you would with schematics.

 

 

Seriously, buy a book or at least work through a tutorial (on Verilog, if you don't like VHDL – the opinions are mixed on this topic), and free yourself from the mindset of individual flip-flops and gates. HDLs are a major PITA compared to good software programming languages, but they're still better than schematics.

 

 

Adrian

 



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eteam00
Professor
Professor
7,179 Views
Registered: ‎07-21-2009

Here's a good place to dip your toe in the HDL waters...

Lots of good stuff at this site.

 

Also:  here and here.

 

- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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howardp
Xilinx Employee
Xilinx Employee
7,141 Views
Registered: ‎07-22-2008

LogiBLOX modules were converted directly to EDN.  Check your old project directory for <module_name>.edn.  The Edif file is not the easiest to read but for something like a counter you should be able to figure out the logic.

 

If you still have the old software version, you could open the LogiBLOX module in the old software and look at the settings to determine what the internal functionality is.

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