FPGAs are not processors. They do not have instructions. They do map your description of digital logic into the flexible digital logic hardware that they are build with.
You need to understand digital logic design before trying to write your hardware description if you expect it to any good.
How much you can combine into one cycle depends on a lot of things such how fast a cycle is, how big the terms are, and what operation you are trying to perform.
Ideally you should have at least some concept of the ANDs and ORs that it will be reduced down to and the actual hardware architecture of the FPGA. With that you can estimate the levels of logic required and thus how fast the clock can run.
Some operations are basically free such as a fixed amount of logical shift, while others such as a multiply are difficult.
If you are trying to add two 512-bit numbers at 600 MHz you are probably going to have issues, but if you try to add eight 128-bit numbers at 60 MHz you stand a very good chance of doing that.