UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor chant_yyy
Visitor
96 Views
Registered: ‎04-11-2019

PS and PL clock

I am a newcomer to vivado PS and PL design,using AX7010. Now I want to make external of FCLK0(PL clock 50Mhz) because I need system_wrapper.v give me  a 50Mhz clock interface, but I don't know how to do it. Thanks a lot if someone can help me!image.png

0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
53 Views
Registered: ‎01-30-2019

Re: PS and PL clock

Hi @chant_yyy ,

whichever pin of the IP you want to make external do a right click on that pin and select make external.

please see the attached snapshots

--Suraj 

make_external 1.JPG
make_external 2.JPG
make-external 3.JPG
0 Kudos