06-19-2014 09:33 AM
I hade some crashs on my PC and now I noticed that my project is broken. I am using ISE 14.7 with schematic entry. I noticed in a simulation (was working before) that a FDC flipflop didn't toggle getting the right signals. Wnen I doubleclick on the symbol I get the message '... the module that defines the symbol could not be determed. ...'. I would expect a piece of Verilog code. I get this message at a couple of primitives. I reinstalled ISE - no change. When I replace the element in the schematic I get the same thing again.
Does anybody has an idea how to repair this ?
06-19-2014 09:57 AM
06-19-2014 09:57 AM
06-19-2014 01:04 PM
Thanks, looks like that is the same issue. But I am talking about elements from Xilinx schematic library. I do not know where the corresponding source files are. The navigator doesn't show me the underlying source. I have no idea how the library symbol and the underlying Verilog code are linked together. Some more complex elements like SR16CLE do show the code when I double click. FDC and NOR2 for example doesn't. Actually I do not really know if this is my issue. All I see is that the simulation is doing nonsense and when I click to the symbols they seem to be empty. I haven't controlled before if I see the Verilog for every library symbol. May be FDC and gates are basic elements that do not have a Verilog implementation. Can you please confirm the expected behavior when I doubleclick a basic library symbol like FDC?
I feel like running in circles.
06-19-2014 04:24 PM
Have you tried to create a new project, just add a few gates and flip-flops and see if you get the same behavior? If not, the issue is project related and may require some sort of clean-up.
06-20-2014 11:12 AM
Yea, good idea. I get the same message. So FDC and gates seems to be basic elements that doesn't have underlaying Verilog code. But my problems sits somewhere else. I got the the simulation running (just a setup issue). So simulation works and hardware is still doing something different. I am now investigating how ChipScope can help. The problem here is, I have a multiboard system with a controller and the FPGA is my memory mapped hardware interface. So I need the controller to activated the tested function, but when the controller is in place I do not have JTAG access to the FPGA. I would need to go through the controller which doesn't execute my firmware in boundary scan mode. The controller uses the chain for ISP. I will need to break the chain to get access.
But thanks for help ;-)