We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Newbie tejna
Registered: ‎01-08-2019

Problem after adding Microblaze to the design


I am fairly new to developing projects using FPGAs especially using Vivado tools. I am working on developing a graphics application on Arty S7 development board which has the Spartan7 FPGA. When I create the project just using VHDL, I am able to see the graphics output on screen. But when I create an IP core for the project and add Microblaze to it using IP Integrator, and export the hardware to SDK to program it, I am not able to see the right output on screen. I can just see a black screen, so not sure where I am going wrong. I was wondering if it has anything to do with clocking or timing. Again I am really sorry if the question seems basic, but do we have to add separate timing constraints file for the project? Because when I did the same project using Xilinx ISE, there was no need for manual timing constraints.

Thank you so much in advance for your time and help.


0 Kudos
1 Reply
Registered: ‎02-01-2013

Re: Problem after adding Microblaze to the design

Spamming an un-answered post to multiple forums isn't going to make the post any better.

Please see:


But just to be a nice guy, let me ask:

What's the Microblaze got to do with it? Are you saying you can successfully package your design as an IP, instantiate it in an IP Integrator block diagram, and produce a working bitfile--but then if you simply add a Microblaze to your block diagram, the original IP stops working? Or did you not try that step yet?

-Joe G.


0 Kudos