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Adventurer
Adventurer
522 Views
Registered: ‎06-25-2018

Re-ordering pins around a hierarchical block

Hello,

May I ask if Xilinx has a documented procedure to re-order pins around a hierarchical block.  I found some discussions in the forum on this topic but nothing really usable.

Thanks,

Jacques

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-27-2018

Re: Re-ordering pins around a hierarchical block

Hi @jmcm,

Order of pins in hierarchical block depend on the order of their creation. Manual reording of the pin is not yet supported in vivado. I have filed an enhancement CR for this before, factory is working on this and this feature might be implemented in a future release.   

Below I am giving the steps to reorder the pins through BD tcl file, but this is only feasible if you don't reorder the pins frequently:-

1) Open BD containing hierarchical blocks and run "write_bd_tcl ./design.tcl" from the tcl console to write the BD tcl file.

2) Open design.tcl. For each pins and interfaces of the hier block you will find "create_bd_pin" and "create_bd_intf_pin" commands respectively. These commands will be in the order of the pins in BD.

3) Change the order as desired, save the tcl and regenerate the BD by sourcing design.tcl in vivado. 

regards,
Chinmay

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Adventurer
Adventurer
464 Views
Registered: ‎06-25-2018

Re: Re-ordering pins around a hierarchical block

Hello Chinmay,

The order of the create_bd_intf_pin and create_bd_pin commands in the tcl file is not the order of the pins in the BD.  They are in alphabetical order. I am using Vivado version 2018.2.

Regards,

Jacques

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-27-2018

Re: Re-ordering pins around a hierarchical block

Hi @jmcm ,

By default interfaces are grouped together and comes first in order in the block, I am not sure about the alphabatical order, can you share the screenshot of the hier block in BD in discussion and your BD.tcl file ?

Thanks,
Chinmay

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Adventurer
Adventurer
439 Views
Registered: ‎06-25-2018

Re: Re-ordering pins around a hierarchical block

Hi Chinmays,

# Create interface pins
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:diff_aes_rtl:1.0 AES_TX
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 C0_DDR3
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 C0_DDR3_S_AXI
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 DIFF_CLK125MHZ_IN
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 DIFF_CLK300MHZ_IN
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 HDIO
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 HDMI_DRU_CLK_IN
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 HDMI_I2C_M
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 HDMI_RX_DDC_OUT
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 HDMI_TX_DDC_OUT
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:vid_io_rtl:1.0 RGB_OUT
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_audio_dma_rd
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_audio_dma_wr
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_gfx_dma_rd
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_video_dma_rd
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 m_axi_video_dma_wr
create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 s_axi_ctrl_pl

# Create pins
create_bd_pin -dir I -from 7 -to 0 AUTOMATION_IN
create_bd_pin -dir O -from 7 -to 0 AUTOMATION_OUT
create_bd_pin -dir O -from 0 -to 0 CHARGE_BATTN
create_bd_pin -dir O -from 0 -to 0 E0_RESETN
create_bd_pin -dir O -from 0 -to 0 E1_RESETN
create_bd_pin -dir O -from 0 -to 0 E3_RESETN
create_bd_pin -dir O -from 0 -to 0 ENABLE_18V
create_bd_pin -dir I EXT_RESET_IN
create_bd_pin -dir I -from 0 -to 0 HDMI_IDT_INT_ALM
create_bd_pin -dir O -from 0 -to 0 HDMI_IDT_RESET
create_bd_pin -dir I HDMI_LOL_IN
create_bd_pin -dir I -type clk HDMI_RX_CLK_N_IN
create_bd_pin -dir I -type clk HDMI_RX_CLK_P_IN
create_bd_pin -dir I -from 2 -to 0 HDMI_RX_DAT_N_IN
create_bd_pin -dir I -from 2 -to 0 HDMI_RX_DAT_P_IN
create_bd_pin -dir I HDMI_RX_DET_IN
create_bd_pin -dir O HDMI_RX_HPD_OUT
create_bd_pin -dir O -type clk HDMI_RX_REFCLK_N_OUT
create_bd_pin -dir O -type clk HDMI_RX_REFCLK_P_OUT
create_bd_pin -dir O -type clk HDMI_TX_CLK_N_OUT
create_bd_pin -dir O -type clk HDMI_TX_CLK_P_OUT
create_bd_pin -dir O -from 2 -to 0 HDMI_TX_DAT_N_OUT
create_bd_pin -dir O -from 2 -to 0 HDMI_TX_DAT_P_OUT
create_bd_pin -dir O -from 0 -to 0 HDMI_TX_EN_OUT
create_bd_pin -dir I HDMI_TX_HPD_IN
create_bd_pin -dir I -type clk HDMI_TX_REFCLK_N_IN
create_bd_pin -dir I -type clk HDMI_TX_REFCLK_P_IN
create_bd_pin -dir I -from 0 -to 0 IRPS5401_ALERTN
create_bd_pin -dir O LTC_OUT
create_bd_pin -dir O -from 0 -to 0 MB_READY
create_bd_pin -dir O -from 0 -to 0 PLAY_STATUS
create_bd_pin -dir O -from 0 -to 0 PL_RESET
create_bd_pin -dir O RGB_OUT_CLK
create_bd_pin -dir I -from 0 -to 0 RNG
create_bd_pin -dir O -from 0 -to 0 SM
create_bd_pin -dir O -from 0 -to 0 SW_POR_B
create_bd_pin -dir O -from 0 -to 0 SW_SRST_B
create_bd_pin -dir O SYNC_3D_OUT
create_bd_pin -dir O -from 0 -to 0 TAMPER
create_bd_pin -dir I -from 0 -to 0 VX1_HTPDN
create_bd_pin -dir I -from 0 -to 0 VX1_LOCK
create_bd_pin -dir I -type clk axi_ctrl_aclk
create_bd_pin -dir I axis_audio_aclk
create_bd_pin -dir I -type clk axis_video_aclk
create_bd_pin -dir O c0_ddr3_m_axi_aclk
create_bd_pin -dir I ltc_clk
create_bd_pin -dir O -from 7 -to 0 pl_irq0_out
create_bd_pin -dir O -from 7 -to 0 pl_irq1_out
create_bd_pin -dir I pl_resetn

Regards,

Jacques

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Adventurer
Adventurer
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Registered: ‎06-25-2018

Re: Re-ordering pins around a hierarchical block

Hi,

One way to handle this is to directly edit the .bd file to re-order the ports and interfaces.

Thanks,

Jacques