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Explorer
Explorer
2,524 Views
Registered: ‎07-25-2016

Regarding the compilation of system generator design as IP catelog

Hi all,

Here i have another query regarding the System Generator designing.

 

I am interested to know if any type of design in System generator can be exported as IP catalog to IP integrator and then develop a software in SDK? what are the considerations that we need to take into account?

 

Please, someone enlighten me on these lines.

 

Thanks

 

regards

shashi

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1 Reply
Xilinx Employee
Xilinx Employee
2,507 Views
Registered: ‎08-01-2008

Re: Regarding the compilation of system generator design as IP catelog

this flow is supported you require to use sysgen generator generated IP catalog core as custom IP . This custom IP can be communicate with your processor interface
Thanks and Regards
Balkrishan
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