I've noticed a limitation in Vivado's IP caching that doesn't seem to be documented. I use OOC synthesis, with the IP Cache scope set to "Remote" and the Cache location set to a directory outside my current project folder. During a normal workflow, I don't have any problems with caching: running a synthesis only resynthesises changed IPs.
But, if I delete the project folder, recreate the project with the project and bd tcl scripts, and then run synthesis, I can see in the Design Runs tab that the status of all Xilinx IPs is "Using cached IP results." All custom IPs, however, are resynthesized. I do set the remote Cache location near the top of the bd.tcl script, before any IPs are instantiated in the bd.
The remote cache directory doesn't contain any IP files of my custom IPs; it only contains Xilinx IP files.
Is caching of custom IPs actually supported? Does caching have to be enabled during IP packaging? My Vivado version is 2016.4.
This issue does seem to be solved in newer versions of Vivado. I was able to verify that IP caching works as expected at least in 2018.3. We will be upgrading as soon as is feasible for us, but a fix for 2016.4 would still be appreciated.