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SOLVED!!! Editing Symbols...Problem? Clarification? Addition info....

No one seemed to want to help, so I figured it out (that's what this is about, isn't it ;)


To solve the problem of edited symbols of existing gates, functions and TTL logic not being acknowledged, I found a way around it. Somewhat tedious, but it works  (until someone offers up something otherwise). Essentially, I noticed that when I put together a schematic that represents a subfunction in my design, I could edit away at the symbol with no ill effects. So, I figured that if I created a subfunction for each gate I wanted to use, that just might work the same way. Sure enough, it did.


It was a tedious process but I managed to create all the subfunction schematics and now I can modify the symbols as I need (mostly for aesthetic purposes). Also, I realized I can continue to use these same subfunction schematics and symbols in other designs.


Hope this helps others....Cheers...Steph


Apologies for the new message. I couldn't figure out how to edit my existing message :(


I wanted to add that I examined the .vhf file and as far as I can tell (with my very limited knowledge of VHDL) it looks as if the edited symbols are being defined in this file. Early on, I realized I had an issue with the editing process changing pin labels and designations, but sorted that out very quickly.


Again, any help is appreciated. I figure it's something fairly obvious, but I somehow cannot seem to see it.



Message Edited by ipsbiz on 02-17-2009 07:11 PM
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