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Sch file

Accepted Solution Solved
Visitor
Posts: 10
Registered: ‎02-23-2009
Accepted Solution

Sch file

I got some old sch files created by Foundation F1.5(Project Manager Build4.05). And I need to open them from ISE10.0(Project Navigator10.0).

 

 

Please help.


Accepted Solutions
Teacher
Posts: 6,500
Registered: ‎02-25-2008

Re: Sch file


study3mouth wrote:

Thanks gszakacs and igortsapenko.

 

I just installed Active-HDL 8.1 and tried it. It seems to me that is is not that easy to convert a Xilinx *.sch created by by Foundation F1.5(Project Manager Build4.05) into VHDL version.

 

Can anybody show me the process in details.

 

TIA


Load the old schematic in ActiveHDL.

 

Print it out.

 

Close ActiveHDL, launch the latest Xilinx tools.

 

Redraw the schematic.

 

I am not kidding. (This is what I had to do when I needed to resurrect an old design, except rather than draw a new schematic I just wrote it in VHDL.)

 

-a


----------------------------------------------------------------
Yes, I do this for a living.

View solution in original post


All Replies
Teacher
Posts: 8,714
Registered: ‎08-14-2007

Re: Sch file

If you can't get the original tools, you may need to get help from Aldec.  After Foundation 4.1i

all ISE releases no longer support the Aldec tool chain including the old schematic capture

which was bundled in the older tools.

-- Gabor
Newbie
Posts: 1
Registered: ‎07-16-2009

Re: Sch file

Aldec's Active-HDL can import your foundtation files and convert them to VHDL or Verilog.
Visitor
Posts: 10
Registered: ‎02-23-2009

Re: Sch file

Thanks gszakacs and igortsapenko.

 

I just installed Active-HDL 8.1 and tried it. It seems to me that is is not that easy to convert a Xilinx *.sch created by by Foundation F1.5(Project Manager Build4.05) into VHDL version.

 

Can anybody show me the process in details.

 

TIA

Teacher
Posts: 6,500
Registered: ‎02-25-2008

Re: Sch file


study3mouth wrote:

Thanks gszakacs and igortsapenko.

 

I just installed Active-HDL 8.1 and tried it. It seems to me that is is not that easy to convert a Xilinx *.sch created by by Foundation F1.5(Project Manager Build4.05) into VHDL version.

 

Can anybody show me the process in details.

 

TIA


Load the old schematic in ActiveHDL.

 

Print it out.

 

Close ActiveHDL, launch the latest Xilinx tools.

 

Redraw the schematic.

 

I am not kidding. (This is what I had to do when I needed to resurrect an old design, except rather than draw a new schematic I just wrote it in VHDL.)

 

-a


----------------------------------------------------------------
Yes, I do this for a living.