Showing results for 
Show  only  | Search instead for 
Did you mean: 
Registered: ‎08-17-2016

Setup & Initialize Viterbi Decoder for packet mode data

Hi all,


I implemented a design which includes the Viterbi Decoder IP. The data transfer to and from the Viterbi Decoder is realized by DMA. The TLAST Signal to DMA is generated by a loadable binary counter. I verifed that test data are correct send to the Decoder and that the expected number of data are transfer from the Decoder via DMA to memory (by ILA).

The same test data are decoded by a Viterbi software decoder. The output is a packet secured by CRC. The CRC checksum is correct for the output of the Viterbi software decoder. However the output of the Viterbi Decoder IP is totally different and therefore CRC fails.

The decoder is a 1/4 rate decoder with the polynoms - decimal 91,121,101,91 with a constraint length of 7. I am using soft bits, width 5 and offset binary.

Originally the data are punctured data.  I implemented both options - NONE punctured by adding "weak1's" similar as for the software decoder and EXTERNAL by adding a special NULL symbol(0xff). When the NULL is detected the associated ERASE bit is set.

For both options the out data stream of the decoder were always the same.


The test data length is 3092 bits - 24x128 = 3072 plus 24bit tail. The tail bits are NON ZERO values. The output is 768 bits. As mentioned I need to use the viterbi decoder in packet mode. I read XAPP551 which explains the necessary hints to feed the decoder. However  it is not clear to me how to contruct the packet data stream for the Viterbi IP

I assume the issue that I have is caused by the fact that the trellis is not in the correct state. This is my problem.

The input data has non zero tail bits do I need them similar as "0" values ie tellis termination?

Or should I ignore them because those are just padding bits from the previous demodulation and I need to implement tail biting?

The input data are multiple of 128bits. Does this means I should set traceback length also to 128 and send the last block first and the first packet additionally as last block - meaning construct input data with 26 blocks N,0,1,....N,0 ???

What about the "best state option" should I use it here??


Any hints are welcome.

0 Kudos
0 Replies