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Participant msauerpb
Participant
1,227 Views
Registered: ‎01-30-2018

Synthesis acceleration with cuda

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Hello,

 

it is possible to accelerate the Synthesis / implementation process with a CUDA graphics Card? Which CPU should I use for best Synthesis Performance (Artix-7 / 200)?

 

Thank you for your help?

 

BR

martin

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1 Solution

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Scholar u4223374
Scholar
1,219 Views
Registered: ‎04-26-2015

Re: Synthesis acceleration with cuda

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(1) No, no support for any hardware acceleration yet. I'm sort of surprised that Xilinx hasn't yet fed the C codebase behind Vivado to SDAccel and produced an FPGA-accelerated version of it (which would then drive sales of more FPGAs).

 

(2) The main aim seems to be exactly what you'd expect: lots of cores (synthesis is largely parallel), high clock speed, big cache, plenty of RAM, and fast storage (ie an SSD).

2 Replies
Scholar u4223374
Scholar
1,220 Views
Registered: ‎04-26-2015

Re: Synthesis acceleration with cuda

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(1) No, no support for any hardware acceleration yet. I'm sort of surprised that Xilinx hasn't yet fed the C codebase behind Vivado to SDAccel and produced an FPGA-accelerated version of it (which would then drive sales of more FPGAs).

 

(2) The main aim seems to be exactly what you'd expect: lots of cores (synthesis is largely parallel), high clock speed, big cache, plenty of RAM, and fast storage (ie an SSD).

Scholar jmcclusk
Scholar
1,194 Views
Registered: ‎02-24-2014

Re: Synthesis acceleration with cuda

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No, I'm not surprised that Xilinx hasn't attempted to create a hardware accelerated VIvado place & route.    Place and Route is full of linear programming problems, using complex dynamically created data structures.   Memory allocation and recovery is literally everywhere.   We are frankly lucky that placement and routing can use multiple threads for a moderate speedup.  

 

It might be possible to port place and route algorithms to an ARM core, such as the Ultrascale+ devices, and this does raise the possibility of a self-programming FPGA device.   But the compilation speed will be frankly inferior to the X86 devices currently available from Intel. 

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