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Visitor
Visitor
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Registered: ‎03-15-2008

Updating user IP to include Xilinx IP

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I'm using Vivado 2017.4 to target a Artix-7 device.  I created a new, custom AXI4-lite IP using the "tools -> create and package new IP" flow.  I instantiated the user core in my top level Vivado project for the FPGA (call the project fpgaTop).  I've changed the core several times and sometimes I added VHDL source files to the core.  To add these new files I included them in the simulation and synthesis file groups in the packager.  This method worked well up until now.  My latest change to the user core required me to instantiate IP derived from the IP catalog (dual port block RAMs).  I built the IPs and they appear as sources in fpgatop Vivado project but the instances of the RAMs in hierarchy view of the user IP have red question marks shown and I get black box warnings during elaboration prior to simulation.  My method of adding additional files to the core using the packager doesn't work since I do not see a way to add an XCI file in the packager (only source HDL, constraints, etc)

 

Should I setup a standalone project for the custom core, build the RAMs in that project and then package the project as IP?  

 

Thanks

David

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Xilinx Employee
Xilinx Employee
1,056 Views
Registered: ‎07-22-2008

Re: Updating user IP to include Xilinx IP

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Add the .xci files to the Synthesis and Simulation File groups.  Just Select "All Files" for the file type when adding the files.

 

Either creating a complete project and packaging it or opening the packaged IP and attempting to add the files to the temporary IP project, should work just as well.

 

I like to work from an original complete project and repackage this project if that is an option.

If you do use the temp project, I would add the .xci files to the project and then let the "Merge changes from File Groups Wizard" selection add the files to the file groups.

 

 

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Xilinx Employee
Xilinx Employee
1,057 Views
Registered: ‎07-22-2008

Re: Updating user IP to include Xilinx IP

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Add the .xci files to the Synthesis and Simulation File groups.  Just Select "All Files" for the file type when adding the files.

 

Either creating a complete project and packaging it or opening the packaged IP and attempting to add the files to the temporary IP project, should work just as well.

 

I like to work from an original complete project and repackage this project if that is an option.

If you do use the temp project, I would add the .xci files to the project and then let the "Merge changes from File Groups Wizard" selection add the files to the file groups.

 

 

View solution in original post

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Moderator
Moderator
837 Views
Registered: ‎06-14-2010

Re: Updating user IP to include Xilinx IP

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Hello @hydedw,

 

This topic is still open and is waiting for you.

 

If your question is answered and/or your issue is solved, please mark a response that resolved your issue, as Accepted Solution (more info on this can be found here: https://forums.xilinx.com/t5/help/faqpage/faq-category-id/solutions#solutions). This way, the topic can be completed then. 

 

If this is not solved/answered, please reply in the thread.

 

Thanks in advance and have a great day.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
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