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Scholar
Scholar
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Registered: ‎12-07-2018

Utility Buffer Differential Inputs

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Hello, I am working with the Utility Buffer IP to bring in Differential Pairs. Quick question why is the External Port on in the IP a CLK? Also, when I right click on the port to create an External Interface Port why does it  add in _clk_ to the signal name?

 

 

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Scholar
Scholar
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Registered: ‎12-07-2018

I'm unable to insert images. So I'll have to attach:

 

 

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Scholar
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Registered: ‎12-07-2018

I'm having trouble uploaded images. So I will have to attach them. 

 

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Registered: ‎12-07-2018

I'm unable to insert images. So I'll have to attach:

 

 

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Scholar
Scholar
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Registered: ‎12-07-2018

I closed this post because I didn't get any comments. 

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Community Manager
Community Manager
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Registered: ‎08-08-2007

Hi @joe306 

 

The Product Guide is a good reference for our IPs. For the Utility Buffer : https://www.xilinx.com/support/documentation/ip_documentation/util_ds_buf/v2_1/pb043-util-ds-buf.pdf

 

A common usecase of the utility buffer is to bring differential clocks into the IPI design. It does not imply a clock buffer is used. 

When you make the external connection you can remain as works best for your design. 

Thanks,
Sandy

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