08-29-2019 06:25 AM
Not sure this is the right subsection but I didn't see any better choice.
I'd like to report a tool bug. There is an option in the GUI to replace an existing verilog source file with a different file. When replacing a legacy verilog .v file with a SystemVerilog .sv file, it appears that the tool doesn't switch context to SystemVerilog. It parses the .sv file as .v and so you will get errors such as the tool not understanding what the "logic" type is.
09-03-2019 02:18 AM - edited 09-03-2019 02:19 AM
Hi @silverace99work ,
I guess the Replace By switch only helps with replacing the files specific to one language.
For instance for verilog file, you can replace it by (.v,.vf,.verilog,.vr,.vg...etc):
While if you allow it for all files then you have to mannuly set the fileset.
09-09-2019 11:58 AM