UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
22,380 Views
Registered: ‎08-18-2011

Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Where do I find the example designs that accompany IP added to the block diagram?

 

I have instantiated both a CPRI module and AXI Memory Mapped to PCI Express [axi_pcie0]

 

Both have a "shared logic" section where I can chose to move clocking etc to the example design - i have looked through the sources directories and cannot find any example design files - does the example have to be generated separately?

 

Also, can the example be placed as a block?

0 Kudos
1 Solution

Accepted Solutions
Explorer
Explorer
29,703 Views
Registered: ‎08-18-2011

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Generate output products is also greyed out in my case.

 

I have found what appears to be the issue:

 

I had instantiated the cores using the block design editor.

 

If I generate the blocks via IP Catalog, I have access to the Example Designs which I can then wrapper and package to use in the block design.

0 Kudos
10 Replies
Xilinx Employee
Xilinx Employee
22,374 Views
Registered: ‎07-11-2011

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Hi,

 

 

Pease refer below pdf for IP integrator examples

 

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_2/ug939-vivado-designing-with-ip-tutorial.pdf

 

Example design specific to IP can be invoked by right cliking on .xci -> open example design,  do not think they can be placed as a block in BD.

 

Hope this helps.

 

 

Regards,

Vanitha.

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
0 Kudos
Explorer
Explorer
22,368 Views
Registered: ‎08-18-2011

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution
For both of the mentioned cores - the Open IP Example Design option is greyed out. Is there a step required to allow them?
0 Kudos
Xilinx Employee
Xilinx Employee
22,360 Views
Registered: ‎07-11-2011

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Hi,

 

But I can see it, is it the same way you are trying ?

 

cpri.png

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
0 Kudos
Xilinx Employee
Xilinx Employee
22,356 Views
Registered: ‎09-20-2012

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Hi,

 

Right click on the IP and click on "generate output products"

 

After the IP products are generated check if you are able to see this option "Open IP example design".

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
0 Kudos
Explorer
Explorer
29,704 Views
Registered: ‎08-18-2011

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Generate output products is also greyed out in my case.

 

I have found what appears to be the issue:

 

I had instantiated the cores using the block design editor.

 

If I generate the blocks via IP Catalog, I have access to the Example Designs which I can then wrapper and package to use in the block design.

0 Kudos
Observer rforsyth
Observer
17,037 Views
Registered: ‎03-25-2013

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

 


Same problem - no matter what I do - generate output products, create the core from the IP catalog - the option to Open example design remains greyed out.

 

I desperately need an example design for the FFT core.

How do I get one?

 

 

greyed out example design.png
0 Kudos
Xilinx Employee
Xilinx Employee
17,033 Views
Registered: ‎02-06-2013

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Hi

 

The FFT core doesn't deliver a example design with it,So the option is greyed out.

 

Example designs are provided with only some cores you can find which cores provide example design from there product guides.

 

http://www.xilinx.com/support/documentation/ip_documentation/xfft/v9_0/pg109-xfft.pdf

 

Have a look at below link if you are looking for FFT example designs.

 

http://forums.xilinx.com/t5/Digital-Signal-Processing-IP-and/FFT-8-0-Design-Example/td-p/338079

Regards,

Satish

--------------------------------------------------​--------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful.
--------------------------------------------------​-------------------------------------------
0 Kudos
Observer donsnpe
Observer
11,468 Views
Registered: ‎05-01-2014

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Is the following correct?

 

If you add IP from withing a block design you are not able to generate an example design.

 

 If you add IP to a project outside of a block design then you can generate an example design but to use it in a block design you then need to go through the IP packager and bring it into the block design in this manor?  

 

This just seems like a convuluted process where you can do things one way outside of the block desing but you cannot do the same thing within the block design.

0 Kudos
Xilinx Employee
Xilinx Employee
11,458 Views
Registered: ‎02-06-2013

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Hi

 

Yes it is correct example design cannot be created from Block diagrams and can be created only in IP Catalog.

Regards,

Satish

--------------------------------------------------​--------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful.
--------------------------------------------------​-------------------------------------------
0 Kudos
Scholar ronnywebers
Scholar
4,095 Views
Registered: ‎10-10-2014

Re: Vivado 2013.3 IP Integrator Example Designs

Jump to solution

Here is a solution :

 

I was struggling with the same issue - I could not find a way to open any IP Example design, the menu item seemed to be greyed out all the time.

 

main reason is probably that you cannot open a design from the 'block design', which is what most people would find a logic way to do this.

 

instead, you should not create a block design and drop the IP on the block design, but add the IP directly to your sources from the IP catalog!

 

Here is a solution that I found/tested with Vivado 2014.4 :

 

1) start a new Vivado project

2) click on 'IP Catalog'

3) find the IP you're interested in - for example 'AXI Uartlite' - don't double click it yet

4) important : first check if the IP comes with any example - you can find this in the documentation -> right click on the IP and click on 'Product Guide'. In Ch. 5 'Example design' you find a description of the Uartlite example design, so there is one present in this Vivado version.

5) double click on the IP, you can customize any parameter if you want, but for opening the example design this has no use of course

6) the 'Generate Output Products' opens -> click on 'Skip', no need to generate any output products

7) in the 'sources' pane, select the 'Hierarchy' tab, and look for the axi_uartlite_0.xci source

8) right click and now you can click on 'Open IP Example design', it will no longer be greyed out !

9) enter some directory where Vivado can create the example project 

10) Vivado will launch a TCl script and start building the example

 

after a while you'll get the example - in this case it's a pure 'code' example, without a block diagram.

 

 

 

 

** kudo if the answer was helpful. Accept as solution if your question is answered **
0 Kudos