09-02-2017 04:08 PM
Shortening system environment variable %PATH% seemed to solve the problem. At least now it recognizes wrapper, and is able to run synthesis and place&route. Just in case someone else have the same problem.
09-07-2017 01:15 AM
i have the same problem. Win7 SP1 x64. Vivado 2017.2.1
Even example projects contain only non-module files and i cant set top-module.
Tried create new empty project and then create vhd-module and got same result
Is there any solution to solve the problem?
10-31-2017 08:32 PM
I meet this same error. Could you tell me how to fix this. Thanks!
The message is like this:
ERROR: [BD 41-241] Message from IP propagation TCL of /mb/mb_0_axi_periph/xbar: set_property error: Validation failed for parameter 'Number of Address Ranges(ADDR_RANGES)' for BD Cell 'mb/mb_0_axi_periph/xbar'. Value '23' is out of the range (1,16)
Customization errors found on 'mb/mb_0_axi_periph/xbar'. Restoring to previous valid configuration.
ERROR: [BD 41-241] Message from IP propagation TCL of /mb/mb_0_axi_periph_mb_only/xbar: set_property error: Validation failed for parameter 'Number of Address Ranges(ADDR_RANGES)' for BD Cell 'mb/mb_0_axi_periph_mb_only/xbar'. Value '65' is out of the range (1,16)
Customization errors found on 'mb/mb_0_axi_periph_mb_only/xbar'. Restoring to previous valid configuration.
10-31-2017 10:05 PM
I think the issue was specific to OS. Are you seeing same issue in windows and linux?
11-05-2017 08:49 AM
Hi... just in case it helps...
I was having the same problem in Vivado 2017.3... I got a microsoft surface pro, hence I gave it a try to use Vivado in Windows 10.... besides other irregularities I found this problem and tried everything in this thread without any positive result... The thing that worked for me was to remove all the sources and add only one source, that source being in the project source dir "/....srcs/sources_1/". After this, so far no more problems...
Hope it helps!
12-08-2017 04:35 PM
I have a deadline tonight at 9pm,
I have now run into a countless number of issues and errors that are *VIVADO SPECIFIC*
CMOD-A7-15T Board - Artix-7
Tried every permutation, everything went to hell when I turned off Automatic hierarchy
Now nothing will work, every source I add (all RTL) ends in this error
This is honestly ridiculous, I'm letting you know I have this issue so you can try and fix it; once this project is complete
I can guarantee you I'm staying far away from Vivado for a good long time
12-11-2017 01:11 AM
You should create a new post an describe exactly the issues you have.
Just complaining that you have issue on other posts (not sure if they are related) and saying that you won't use vivado anymore won't help you to solve the issue.
12-11-2017 04:01 AM
Recently upgraded from Vivado 2016.3 to 2017.3, I have the same problem. When creating the hdl wrapper from the block design, the output file goes to "Non module files", and nothing works (synthesis, etc.). I have windows7 x64.
Looking forward for a patch from Xilinx!!!
12-11-2017 04:04 AM
There is no patch because nothing has shown that it was a vivado issue. So asking for a patch won't give one.
Tell us what you have tried? Did you check the path length?
It would be better to create a new post and really describe your issue
12-11-2017 05:08 AM
First of all, thanks for your reply.
Yes, I read the whole forum thread, then shortened the PATH variable.
Things I made:
Create block design
Add IP: zynq processing system
Right click on block design: create hdl wrapper.
Tcl console output:
make_wrapper -files [get_files C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/design_1.bd] -top
INFO: [BD 41-1662] The design 'design_1.bd' is already validated. Therefore parameter propagation will not be re-run.
Wrote : <C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/design_1.bd>
VHDL Output written to : C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/synth/design_1.v
VHDL Output written to : C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/sim/design_1.v
VHDL Output written to : C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.v
add_files -norecurse C:/ws_vivado/project_4/project_4.srcs/sources_1/bd/design_1/hdl/design_1_wrapper.v
update_compile_order -fileset sources_1
But errors are in messages output:
12-11-2017 05:13 AM
Could you zip you project and attached it to a new thread on the forum (this one mixes too many vivado versions)?
01-24-2018 02:17 AM
Is there a solution or workaround? I read the whole thread but see no solution...
I'm facing similar problems (vivado exits at hdl wrapper generation/inclusion/etc), so i don't consider it usefull to post my project/logs etc.
01-28-2018 04:27 AM
I have facing the same problem saying above.
Win7 64bit,I tried both 2017.1 and 2017.4
But When I Restart my computer,and close the antivirus software,then the porblem has gone.
I write my experience here,in case This way is useful for you to fix your porblem.
02-08-2018 06:50 AM
Thank you @wxzcldw for your suggestion!
Xilinx Forum Moderator
02-24-2018 01:36 AM
I just restart my pc and disabled antivirus. after that I opened the vivado and the problem gone.
04-25-2018 06:50 PM
I was having a similar problem. "filemgmt:20-2001" Not able to resolve design hierarchy. For me the solution was to restart my computer. Windows-10 64-bit, Vivado 2018.1.
05-11-2018 11:20 AM
From what we've been able to determine from those reporting this issue;
- This is not design / project dependent, expect that the project has to have some HDL file added.
- The problem is seen under the following situations
- Opening a project that has an HDL source
- Adding an HDL source to an empty project
- Creating an HDL Wrapper for a block diagram (which effectively adds an HDL source to the project).
- The problem effects all versions of Vivado from Vivado 2017.1 to Vivado 2018.1.
- Vivado 2016.4 and earlier is not effcted because it does not use the srcscanner.exe executable for parsing.
- The problem has nothing to do with the Vivado install, and once it starts happening, will occur for every version of Vivado between 2017.1 and 2018.1 although they may have been previously running without issue.
- It occurs when a hierarchy refresh is done (srcscanner.exe is run).
- Vivado SW developers believe that the failure happens in lower level libraries due to a missing "Event ID 6005" on the user's system.
- Most occurrences have been on Window 10 platforms but also some Windows 7 machines.
- Rebooting a machine can often resolve this, with Event ID 6005 being issued with the reboot but that is not always the case.
- Removing or renaming "C:\Users\username\AppData\Local\Microsoft\Windows\\UsrClass.dat" before the reboot may help get the system in sync. (Still looking for more feedback on this).
I’ve created an Answer Record 71064 (2018.1 Vivado - Vivado crashes when opening a project or adding an HDL source file to a project) which currently has pretty much the same information as above. It is internal at the moment but should be public some time next week. When I have more answers, I'll update the AR.
05-18-2018 09:27 AM - edited 05-18-2018 09:27 AM
A quick update.
According to feedback, the .dat file renaming idea was not useful.
However, Xilinx development created a small utility that can be run on a windows system to start event ID 6005. Multiple customers have reported that after running the executable, they were able to open their projects in Vivado and proceed with their designing
This utility is available with Answer Record 71064
10-08-2018 07:14 AM
Answer Record 71064 no longer exists. Can I obtain this utility from anywhere else?
02-25-2019 11:50 PM
I have encoutered the same problem.
Even when I open the old correct projects, the hdl wrapper file is still seen as non-module.
Then I realized that I didn't reboot my windows system after system update.
After reboot, vivado went back to normal.
This might help.
05-21-2019 08:02 PM
Got same problem with Vivado 2018.2.
In my case, it turned out that the system service "Windows Event Log" was turned off somehow. After enabled and started the service, Vivado worked well. Disabled the service, the issue appeared again.