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Vivado critical warning when creating hardware wrapper

Observer
Posts: 28
Registered: ‎04-11-2016

Vivado critical warning when creating hardware wrapper

Hi there

 

I am constructing a zedboard system using Vivado 2017.1. I have a Zynq Processing System block connected to a single AXI peripheral, and have used the design assistant to add the DDR and Fixed IO interfaces. When I add a hardware wrapper to this design, I get two critical warnings:

 

[PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.

[PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.

 

Can these warnings be ignored?

 

Best regards

Geoff 

Teacher
Posts: 5,141
Registered: ‎03-31-2012

Re: Vivado critical warning when creating hardware wrapper

gmortimer@ferrari.it are these numbers you entered manually? If so, there is some chance that they'll cause issues. I have never seen any warnings like this.

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Observer
Posts: 28
Registered: ‎04-11-2016

Re: Vivado critical warning when creating hardware wrapper

No nothing entered manually, just used automatic tools. I know DDR2 is timing-critical, horrible stuff, but these numbers came from Vivado. I am using 17.1 (lovely improvements) but no manual intervention. I can send you the project if you like.

 

Best regards Muzaffer,

Geoff

Visitor
Posts: 14
Registered: ‎01-26-2016

Re: Vivado critical warning when creating hardware wrapper

I ran into this exact issue. I am simply following the very basic getting started tutorial with a processing system and GPIO. All is automated, and using 2017.1
Visitor
Posts: 3
Registered: ‎05-07-2017

Re: Vivado critical warning when creating hardware wrapper

Exactly same values on my side, I was also following a guide

Observer
Posts: 22
Registered: ‎10-06-2008

Re: Vivado critical warning when creating hardware wrapper

Same thing here with a Zedbaord project imported to vivado 2017.1 from vivado 20116.4:

 

There were CRITICAL WARNINGS during the implementation:
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.009 . PS DDR interfaces might fail when entering negative DQS skew values.
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.061 . PS DDR interfaces might fail when entering negative DQS skew values.

 

 

 

Newbie
Posts: 2
Registered: ‎05-14-2017

Re: Vivado critical warning when creating hardware wrapper

Well,I have the exactly same warning. It is solved by changing the two values to positive. 

Highlighted
Visitor
Posts: 10
Registered: ‎10-06-2015

Re: Vivado critical warning when creating hardware wrapper

Same issue here. Different base board. Upgrading from previous version of Vivado. It did not give me this error previously. I think Vivado must be handling something differently in the presets of the boards. I haven't tried running it yet on the hardware with this warning.

Explorer
Posts: 200
Registered: ‎02-07-2008

Re: Vivado critical warning when creating hardware wrapper

Same experience here. I would like to add that this is an intermittent problem, because I've seen that the same script will sometimes pass without any critical warning.

 

Checking the parameter values using get_property has shown me that the values are always negative, regardless of whether the critical warning appeared or not. Same values too if you do the same thing in Vivado 2016.4 (or earlier) and use this command to check one of the parameter values:

 

get_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 [get_bd_cells processing_system7_0]

 

You see that the parameter is the same negative number, but Vivado 2016.4 and earlier versions didn't complain about it.

 

So I think it's safe to ignore this critical warning. Setting the values to positive numbers might actually create a problem with the DDR interface, so I don't think that's a viable solution.

 

Jeff

 

Newbie
Posts: 1
Registered: ‎05-31-2017

Re: Vivado critical warning when creating hardware wrapper

the same issue. I am following one tutorial from Zynq Book for Zed/Zybo board.

My vivado is 2017.1

The examples in the tutorials could be done successfully besides this kind of warning.