cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Observer
Observer
480 Views
Registered: ‎08-03-2017

Vivado - general

Jump to solution

I am running a project in Vivado (v2018.3 (64-bit)).

Can you tell me why I keep getting this error message and how to fix it?

  • [Common 17-53] User Exception: No open design. Please open an elaborated, synthesized or implemented design before executing this command.

Thanks,

>>Eric

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Observer
Observer
399 Views
Registered: ‎08-03-2017

Re: Vivado - general

Jump to solution

Hey -

I was running from the gui.

Eventually, this message quits repeating.  I cannot currently "re-energize" it.

It just seems strange that with an open design in the gui, the message calls for openning it again.

View solution in original post

4 Replies
Highlighted
Moderator
Moderator
446 Views
Registered: ‎01-16-2013

Re: Vivado - general

Jump to solution

@eholtzclaw 

 

The command which you are running is valid on open elaborate or synthesized or implemented design.

Few TCL commands need the design to be opened in elaboration/synthesis/implementation for running. 

Example get_cells command

 

Can you share the snapshot of error message with TCL command used or share the log file which has this error message. 

 

--Syed

---------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
---------------------------------------------------------------------------------------------
Highlighted
Xilinx Employee
Xilinx Employee
445 Views
Registered: ‎05-22-2018

Re: Vivado - general

Jump to solution

Hi @eholtzclaw ,

You need to open design whether Elaborated, synthesis, implemented before prooeeding for further phase or analysis.

  • RTL Analysis -> Open Elaborated Design
  • Synthesis -> Open Synthesis Design
  • Implementation -> Open Implemented Design

Thanks,

Raj Singh

Highlighted
Teacher
Teacher
433 Views
Registered: ‎07-09-2009

Re: Vivado - general

Jump to solution

Are you using the GUI ?

Some tabs / instructoins can only be preformed once a design has been synthesised or P&R

For instance, if you want to report timming sumary, then synthesis has to be done. BUT this could also be the implimented design.

so if you double click the open synthesised desing, then the report timing summary wil be available for the post symthesised design.

 

I guess this structure all comes out as the Xilinx people seem to do mainly TCL based runs, not GUI based,

  

 

 

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
Highlighted
Observer
Observer
400 Views
Registered: ‎08-03-2017

Re: Vivado - general

Jump to solution

Hey -

I was running from the gui.

Eventually, this message quits repeating.  I cannot currently "re-energize" it.

It just seems strange that with an open design in the gui, the message calls for openning it again.

View solution in original post