I run FPGA flow via tcl instead of vivado itself.
Now I met an issue that I define a micro named FPGA, it can't recognize FPGA when I add another micro name FPGA_A under FPGA.
It Seems that FPGA_A covers FPGA.
Could anyone know what cause this issue and how to fix it?
Thanks a lot !!!
Could you please explain this a bit further? What do you mean by micro? Are you facing issues related with your TCL script, or with Vivado environment? Any code snippet?
Hopefully we can help, but we can't guess.