06-29-2020 11:33 AM
Xilinx is a company, not software. Xilinx has no version. Xilinx ISE is software that is used for design of older FPGAs. Xilinx ISE 12.1 is a fairly old version of this software. Xilinx ISE14.7 is the newest version of ISE. For newer FPGAs (7 series and Ultrascale) use Vivado.
06-29-2020 11:44 AM
Okay, I agreed with your answer, and thanks. My question is Whether Xilinx 12.1 and Xilinx ISE tool give the same results or different results for the same Verilog COde?
06-29-2020 12:00 PM
One more time. Xilinx is a company. They can sell you an FPGA. They can sell you a board with an FPGA. They can sell you software to develop FPGA designs. They can provide you with free versions of that software, whether ISE or Vivado. Xilinx, as a company will do nothing with verilog for you. It is the software, either ISE or Vivado that can synthesize verilog, then place and route the synthesized design into the Xilinx FPGA you are using.
06-29-2020 12:09 PM
06-29-2020 12:17 PM
Thanks for your answer
I need a little bit elaborate answer why Xinlix 12.1 and Xilinx ISE 14.2 give a different result for the same Verilog HDL code even both belong to the Xilinx family?
06-30-2020 01:38 AM
Whats the problem with two results from the same source,
provided they both meet constraints ?
If you could elaborate on the need, then may be some one could help more ,
06-30-2020 07:54 AM
I designed an FIR filter (Verilog HDL) and Synthesized through two Xilinx FPGA family i.e) Xilinx 12.1 & Xilinx ISE 14.2. Both tools give different answers in terms of LUT, Slices/Registers, BEL. So may I know why both tools give different results in terms of LUT, Slices/Registers, BELfor the same FIR filter source?
07-01-2020 03:23 AM
Its totally expected for there to be different resources etc on different tools.
Fundamental, the tools work till they meet your regiments and then stop.
Amongst many other things, such as new chip information, as tools mature, their optimisation algorithms get better,
Remember the tools do not implement your design as is, they implement the functionality you describe.
The tools also do things like register duplication, register push back / forward, again the algorithms change as the tools mature.
Provided you have constraints, and the tools meet your constraints, then all is fine.
( I have seen a design which had no constraints, just built and then tried on hardware. It worked and they shipped. Came to do a modification two year later, and they could not get the design to work on hardware, as they were just relying upon luck )