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Voyager
Voyager
8,867 Views
Registered: ‎10-21-2015

axi quad spi v3.2(vivado 2015.4) slave select pin doesn't assert

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Hi

My setup for axi quad spi on zynq is the following figure.

axi_quad_spi.png

The value of SPI control register is 0x86.

The firmware transmits some value  in infinite loop.

When I checked ss[0], sck, io0 with oscilloscope, the signal sck, io0 looks normal.

But ss[0] is always high. It never assert to active low.

 

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Teacher
Teacher
16,038 Views
Registered: ‎03-31-2012
"manual ss mode" means you need to manually toggle ss ie it's your responsibility to set it low before you start the transaction.
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Teacher
Teacher
8,834 Views
Registered: ‎03-31-2012
are you using auto ss mode or manual ss mode?
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Voyager
Voyager
8,825 Views
Registered: ‎10-21-2015

Thanks for your replay

I used manual ss mode.

 

This is my firmware program.

 

spi[SRR] = 0x0000000A; // Reset

set_bit(&spi[SPICR], MTI, 0); // Master Transaction Inhibit disabled 

set_bit(&spi[SPICR], MASTER, 1); // Master configuration

set_bit(&spi[SPICR], SPE, 1); // SPI system enabled

// SPICR(SPI Control Register) Manual Slave Select Assertion Enable : 1(default)

// SPISSR(SPI Slave Select Register) : 0x1 (default)

uint8_t dat[5] = {0x02, 0x07, 0x38, 0x40, 0x00};

while (1) {

   for (int i=0; i<5; i++) {

        spi[SPIDTR] = dat[i];

        while ((spi[SPISR]>>TX_FULL)&1);

   }

   usleep(100);

}

 IMAG002.BMP

cyan color is ss, yellow is sck.

Is there something wrong in my firmware?

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Teacher
Teacher
16,039 Views
Registered: ‎03-31-2012
"manual ss mode" means you need to manually toggle ss ie it's your responsibility to set it low before you start the transaction.
- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

View solution in original post

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Voyager
Voyager
8,820 Views
Registered: ‎10-21-2015

 

I fixed my firmware to toggle the 0th bit of SPISSR. 

Now, it works well

Thank you again

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Observer
Observer
6,332 Views
Registered: ‎03-29-2016

Hi hokim,

May i know the firmware for toggling the SPI slave select register.Kindly share the firmware or an idea.

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Visitor
Visitor
4,490 Views
Registered: ‎04-04-2017

Hi In this picture the sclk in not a square wave. I meet this problem in my design too. Did this signal look normal after you fixed your firmware?

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Adventurer
Adventurer
386 Views
Registered: ‎12-10-2019

Hi, I understand that we must set the cs to low before a transaction, but in the example provided by xilinx they don't set the cs to high once the tx is finished, do you know why?

path: (folder were you install vivado)

data\embeddedsw\XilinxProcessorIPLib\drivers\spi_v4_4\examples\xspi_eeprom_example.c

they select the slave but never deselect it

	/*
	 * Set the SPI device as a master and in manual slave select mode such
	 * that the slave select signal does not toggle for every byte of a
	 * transfer, this must be done before the slave select is set
	 */
	Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION |
					XSP_MANUAL_SSELECT_OPTION);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}

	/*
	 * Select the slave on the SPI bus, the EEPROM device so that it can be
	 * read and written using the SPI bus
	 */
	Status = XSpi_SetSlaveSelect(&Spi, SEEPROM_SPI_SELECT);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}

thanks

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