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s002wjhw
Voyager
Voyager
2,915 Views
Registered: ‎06-26-2015

bram controller size

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why is the Memory Depth is gray out(even after I change the range size under address editor).  any way to change the depth of ctrl and ram

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s002wjhw
Voyager
Voyager
3,942 Views
Registered: ‎06-26-2015
nvm it look like I have to re-generated the output product for the address to take effect

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austin
Scholar
Scholar
2,910 Views
Registered: ‎02-27-2008

You are asking for 256 Kbytes of BRAM memory,

 

That exceeds the capabilities of the IP core (and likely your device as well).

Austin Lesea
Principal Engineer
Xilinx San Jose
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s002wjhw
Voyager
Voyager
3,943 Views
Registered: ‎06-26-2015
nvm it look like I have to re-generated the output product for the address to take effect

View solution in original post

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melkin
Explorer
Explorer
2,835 Views
Registered: ‎02-13-2012

Is this BRAM part of a Block Design (versus stand alone)? 

 

If this is a stand alone core, then the depth should be editable.  And the prior suggestion to regenerate the core is appropriate.  However...

 

I had a similar situation when adding BRAM controllers to a BD.  I discovered that the Memory Depth was calculated based on the AXI Address Range specified in the Address Editor.  So if this BRAM controller is part of a BD, go to the Address Editor and modify the range.  That should take of it.

 

 

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melkin
Explorer
Explorer
2,833 Views
Registered: ‎02-13-2012

Austin wrote: You are asking for 256 Kbytes of BRAM memory,

 

FYI. That is 256K _bits_, not bytes.

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austin
Scholar
Scholar
2,827 Views
Registered: ‎02-27-2008

word width 256 bits,

 

address size 1024 words.

 

256 * 1024 == ? bytes

 

256 Kbits

 

/8 = 32 Kbytes (always should use a calculator ....)

 

Also always check the IP wizard limitations.

 

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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