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Explorer
Explorer
987 Views
Registered: ‎07-20-2009

custom IP and IP integrator in non project mode

Hi all,

 

As my understanding , we can use an IP integrator(block design) in non project mode by sourcing the TCL file.

(after creating block design in project mode and wtite_bd_tcl to save block design to a TCL file).

 

Is it possible to use a custom packaged IP in the IP integrator and use it in non-project mode?.

Means, I have packaged a directory containing two files a.v and b.v to component.xml. I can use this in the IP integrator in project mode. Can I use this in IP integrator in non-project mode? If possible, what are the steps and commands?

 

I use Vivado 2017.1

 

Regards

Anoop 

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3 Replies
Moderator
Moderator
967 Views
Registered: ‎01-16-2013

Re: custom IP and IP integrator in non project mode

@anoopjoseph,

 

Yes, it is possible. To know the exact steps complete the flow in GUI and check the TCL commands in TCL console.

Note: for custom IP, You will need to add the IP reprository and refresh the IP catalog.

 

set_property  ip_repo_paths <repo_path_list> [current_fileset]

update_ip_catalog

 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug912-vivado-properties.pdf#page=237 

 

--Syed

 

 

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Newbie soccerchamp
Newbie
927 Views
Registered: ‎03-07-2018

Re: custom IP and IP integrator in non project mode

@syedz,

 

Thanks for your reply.
I just changed my user ID.

 

Your solution seems working. But I have some other problem. Could you please help?. I gave below commands.

 

set_property ip_repo_paths <repo_path_list> [current_fileset]
update_ip_catalog
source design_bd.tcl
generate_target all [get_files design.srcs/sources_1/bd/design_bd/design_bd.bd]
synth_design -top ${design_name} -part ${device}

 

When RTL elaboration start, following error occurred. Did I miss anything?

 

ERROR: [Synth 8-439] module 'design_bd_axi_apb_bridge_0_0' not found [design.srcs/sources_1/bd/design_bd/hdl/design_bd.v:388]

 

Regards

Anoop

 

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Observer soccerchamp
Observer
891 Views
Registered: ‎03-08-2018

Re: custom IP and IP integrator in non project mode

I found a solution.

After generate_target all, .xci corresponding to each IP in IP integrator will be generated in sources_1/bd/design_bd/ip/design_bd_*/

They need to be synthesized as OOC modules.

So I read each .xci files and synthesized them in a loop using synth_ip command. 

 

After I did this, I could able to synthesis my TOP module.

 

Thanks & Regards

An

 

 

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