I want a use a comparator for floating point signals.
i have made the ip core and i see that the output is (0 downto 0).
Does anyone know how comparator work?
thanks in advance.
The data sheet for the core will tell you that the result of a comparison is obviously boolean and so the result only needs to be 1bit, 1=true, 0=false.
signal a : std_logic_vector(0 downto 0) := "0";
is the same functionally as
signal a: std_logic := '0';
Syntactically VHDL will complain about different types but it's the same thing functionally, just access it via a (0 downto 0) signal.