07-22-2009 01:45 AM
i have worked in verilog and i have used alot of fpga interfaces of xilinx spartan 3e board like vga, rotary swith, and other switches.
now i am planning to work on the ddr sdram. i am reading the data sheet which is quiet lengthy. i just need to know if someone have
worked with ddr sdram interface. can anyone help me with it or tell me some useful stuff that can guide me and make my job a bit easy
07-22-2009 03:01 AM
You should consult MIG (Memory Interface Generator) datasheet to start off with DDR. A lot of material is present on Xilinx site. MIG is especially used for DDR and DDR2 interfaces.
07-22-2009 03:07 AM
thanks for reply
i have xilinx ise 9.2i core generator but it does not have MIG in it. how can i get it seperately
i was searching from the web but i am yet to succeed please do guide me
07-22-2009 05:29 AM
MIG is very much there in my 9.2 version service pack 4.
When you open croegen and go for create new project then under the list of various controllers MIG is mentioned under "Memories and Storage Elements".
07-22-2009 10:27 AM
For 9.2 you may need to get the corresponding IP Update in order to see MIG. I don't quite recall exactly when MIG was integrated into the downloads. I do recommend you update your ISE if at all possible. There have been many enhancements and bug fixes since 9.2. 11.2 is the current release.
07-22-2009 08:52 PM
thanks .prateep i do know the location and i have checked for MIG but it is not present in memories category
i am trying to update the software but failing to do so. i can not fiigure out the problem
07-22-2009 10:09 PM
You need to have IP update 2 installed with ISE 9.2i (SP4) in order to use MIG. I doubt whether you will get updates at present for 9.2 because the latest version in the market is 11.2. For 11.2 you will get everything from XILINX site. In order to enquire about old updates you open a webcase with xilinx. Those guys will help you out.