how to define a ip with axi_lite bus and ordinary ports ?

[microchip_zhang]

I  want to create a  ip with axi_lite bus and ordinary ports , which item I should select between the "package a specified directory" and "create a new AXI4 peripheral"shown below in the figure ? 

firstly I  select  the "package a specified directory" item,but I can not find the place which can select the axi bus type.

[philipwu]

Hi @microchip_zhang 

It looks like you may want to create a new AXI4 Peripheral if you want to select the axi bus type. 

This document highlights the different options for creating/packaging IP. 

UG 1118 
Page 38: Packaging a Specified Directory  
Page 40: Creating a New AXI4 Peripheral

[olupj]

Hi@microchip_zhang 

Check this thread (and helpful findings from @dgisselq ) before you use the AXI-4lite interface Xilinx provides. I have found it to hang on writes.

It was relatively trivial to use other examples as the basis for memory mapped control of custom IP. I recently used analog devices system successfully.

Regards,

Jerry

[dgisselq]

@olupj ,

I personally use this example slave any time I need an example AXI-lite slave IP to build from .  1) it's light on logic, 2) with the skid buffer's it's really high speed (faster than Xilinx's broken AXI-lite infrastructure), and 3) unlike Xilinx's demos it actually works.

Dan

[olupj]

Hey @dgisselq 

I've the FMCOMMS a few times from Analog so I've stuck with their axilite slave.

Just trying to save @microchip_zhang  a day of minor frustration with Xilinx's IP. 

Thanks,

Jerry

[microchip_zhang]

thanks a lot for all of you