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Newbie nbentall
Newbie
2,690 Views
Registered: ‎02-15-2010

how to pass parameter or macro to schematic?

I have a schematic which connects some verilog modules together. Inside one of the modules is a ROM which I currently initialise with a readmemh command. It works fine, but I'd like another instance that loads from a different file. If this were done with all-verilog flow (i.e. text only, no schematic) I could easily parameterise and pass the file name as a parameter down the couple of levels of hierarchy, however, because there is a schematic (ISE) involved, I can't work out (or find any docs) about how this can be done. 

 

Any ideas?

 

Thanks,

 

Nat 

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