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sbouffard
Visitor
Visitor
1,376 Views
Registered: ‎05-29-2019

simulating encrypted IP source code with Modelsim

Recently I've been experiencing with encrypting source code with the Vivado 2018.3 "encrypt" function from the tcl consol.

I've generated an encrypted .vp file which I try to compile and simulate with Modelsim.

During the compilation I get the following error :

# ** Error: ../../../hdl/sdi_if_wrapper.vp(9): (vlog-14146) Semantic error for right "decryption" near token ")".

I've been experimenting with the exemple encryption key/header that Xilinx provides. Here's the source code from which i get the error from :

`pragma protect begin_protected
`pragma protect version = 2
`pragma protect encrypt_agent = "XILINX"
`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2015"
`pragma protect begin_commonblock
`pragma protect control error_handling = "delegated"
`pragma protect control runtime_visibility = "delegated"
`pragma protect control child_visibility = "delegated"
`pragma protect control decryption=(activity==simulation) ? "true" : "false"
`pragma protect end_commonblock
`pragma protect begin_toolblock
`pragma protect rights_digest_method="sha256"
`pragma protect key_keyowner = "Xilinx", key_keyname= "xilinxt_2017_05_active", key_method = "rsa", key_block

`pragma protect control xilinx_configuration_visible = "false"
`pragma protect control xilinx_enable_modification = "false"
`pragma protect control xilinx_enable_probing = "false"
`pragma protect control xilinx_enable_netlist_export = "false"
`pragma protect control xilinx_enable_bitstream = "false"
`pragma protect control decryption=(xilinx_activity==simulation) ? "true" : "false"
`pragma protect end_toolblock="1nx9NUNJyF8/bd++80yh7HJfpVTvJqzTTB1oa2YTvck="
`pragma protect data_method = "AES128-CBC"
`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 15344)
`pragma protect data_block

The line that gives  me an error is the following :

`pragma protect control decryption=(activity==simulation) ? "false" : "true".

 

Anyone experienced a similar problem when simulating on modelsim ?

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3 Replies
graces
Moderator
Moderator
1,341 Views
Registered: ‎07-16-2008

Did you specify key file when you "encrypt" the RTL file?

You mentioned,

The line that gives  me an error is the following :

`pragma protect control decryption=(activity==simulation) ? "false" : "true".

But in the encrypted source, the right expression statement is reversed.

`pragma protect control decryption=(activity==simulation) ? "true" : "false"
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sbouffard
Visitor
Visitor
1,331 Views
Registered: ‎05-29-2019

that was my msitake I accidently switched them up while typing it in, but that isn't the issue.  when I use the encrypt function from the vivado tcl console I did specify the encryption key used and the path to it. Could it be a library issue, perhaps something I should add to Modelsim so he recognizes the key used?

So far I achieved to encrypt it with Modelsim and simulate it. But my concern is when it will be time to synthetize it through vivado, it won't be able to recognize the Modelsim's encryption..

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graces
Moderator
Moderator
1,318 Views
Registered: ‎07-16-2008

What is your key file like? From UG1118, pg97, Table 6-3,

when "xilinx_activity==simulation" condition is true, the expression result would be "false".

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Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs.
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