cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
kaveri
Visitor
Visitor
1,076 Views
Registered: ‎05-14-2018

xilinx ise 14.7

I am looking for how to use the Virtual Input Output IP in DFF program and clock wizard

0 Kudos
3 Replies
anatoli
Moderator
Moderator
1,010 Views
Registered: ‎06-14-2010

Hello @kaveri,

 

Is this in relation to ISE or Vivado? Can you confirm on this please?

 

The below should help you with your query:

 

Product Guide 159: https://www.xilinx.com/support/documentation/ip_documentation/vio/v3_0/pg159-vio.pdf

Answer Record: https://www.xilinx.com/support/answers/54606.html

User Guide 896: http://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_1/ug896-vivado-ip.pdf

 

Hope this helps.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos
bruce_karaffa
Scholar
Scholar
1,004 Views
Registered: ‎06-21-2017

@anatoli 

 

 

0 Kudos
anatoli
Moderator
Moderator
1,001 Views
Registered: ‎06-14-2010

Apologies @bruce_karaffa, indeed, i was relying on the latest version VIO IP core. 

I will remove my comment now, so that it won't cause any confusions.

Thanks for letting me know and have a nice day.

 

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos