05-14-2018 11:09 PM
I am looking for how to use the Virtual Input Output IP in DFF program and clock wizard
05-17-2018 04:29 AM - edited 05-17-2018 05:57 AM
Hello @kaveri,
Is this in relation to ISE or Vivado? Can you confirm on this please?
The below should help you with your query:
Product Guide 159: https://www.xilinx.com/support/documentation/ip_documentation/vio/v3_0/pg159-vio.pdf
Answer Record: https://www.xilinx.com/support/answers/54606.html
User Guide 896: http://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_1/ug896-vivado-ip.pdf
Hope this helps.
05-17-2018 05:50 AM
I hate to disagree with a Xilinx moderator but I have ISE 14.7 open in a Spartan 6 project. I just generated a VIO core right now. I have previously used a VIO in other Spartan 6 projects. It worked just fine.
Bruce
05-17-2018 05:57 AM
Apologies @bruce_karaffa, indeed, i was relying on the latest version VIO IP core.
I will remove my comment now, so that it won't cause any confusions.
Thanks for letting me know and have a nice day.