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Visitor
Visitor
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Registered: ‎01-02-2020

Connecting a FPGA to an ASIC (similar to a Hybrid ASIC and FPGA architecture)

Hi everyone, I have a design implementation by partial reconfiguration using a virtex-7 board. My doubt is: Is possible run the reconfigurable logic in the FPGA and the static logic in a ASIC chip? Something similiar to a hybrid ASIC and FPGA architecture.

 

Best regards!

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Moderator
Moderator
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Registered: ‎05-08-2012

Hi @pfrrodrigues 

Since a few things like global clocking resources (MMCMs, BUFGs...) and all IOs are required to be in the static for 7-Series designs, this would not be possible.

 

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Visitor
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Registered: ‎01-02-2020

I think that I formulated the question in the wrong way. My aim is to do something similar to partial reconfiguration. I would like to construct a system with a few parts running in a FPGA and others running in an ASIC and connect the netlist of both them. Is this possible?

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Moderator
Moderator
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Registered: ‎05-08-2012

Hi @pfrrodrigues 

Using FPGAs within a system with other chips such as ASICs is common, but the Dynamic Function eXchange feature (formerly Partial Reconfiguration) is applied to a single specific supported part. It generates bitfiles and partial bitfiles for an individual part.

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