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csehydrogen

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10-04-2018 11:40 PM

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Registered:
07-09-2018

Hello,

I wonder there exist some "easy" ways to make these math functions for single(or double) precision floating-point:

cos, sin, tan, acos, asin, atan, log2, log10, pow, fmod

My thought until now:

cos, sin, atan : CORDIC ip has fixed-point version of these. so maybe possible with fixed<->floating conversions and fmod

tan : sin(x) / cos(x) ?

acos, asin : no idea at all...

log2, log10 : ln(x) / log(2) or log(10)

pow : exp(y*ln(x))

However, these ways are complex and take like 100++ latency.

FPGA newbie http://github.com/csehydrogen

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johnvivm

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10-04-2018 11:58 PM

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Registered:
08-16-2018

The easy way is to write them in an HLS file that then you pack into an IP block.

Efficient? Useful? You only asked for 'easy', right?

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johnvivm

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10-04-2018 11:58 PM

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08-16-2018

The easy way is to write them in an HLS file that then you pack into an IP block.

Efficient? Useful? You only asked for 'easy', right?

csehydrogen

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10-05-2018 12:29 AM

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07-09-2018

Re: How to make various floating-point math functions? (which are missing from Xilinx IP Catalog)

Oh, I didn't think of HLS. I'll try that

FPGA newbie http://github.com/csehydrogen

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drjohnsmith

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10-05-2018 06:28 AM

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Registered:
07-09-2009

Re: How to make various floating-point math functions? (which are missing from Xilinx IP Catalog)

do you want these for simulation only or also to be synthesis able ?

What size data are you looking at ? The full IEEE FP ?

There are lots of 'tricks' used over the decades to make approximations to all of these work fast,

normally in fixed point, as floating points are not generally resource effective in FPGAs.

e.g sin waves => look up tables, then if more precision required, interpolation between nearest pints, newton etc come to mind.

also for "the ends", a straight line is a good approximation to a sine wave ! then a cubic spline for the middle, and have quarter or 8th inversions / rotations to gt into the correct quadrant

Cordics, I seem to remember, have a latency of how ever many bits you have, so if you want a 32 bit answer, you have 32 clocks delayed. 32 bits around a circle is 0.000000008 degrees per bit, You want better than that !

dont forget for the simulation, you have the maths library that gives you all of these,

Also this is the xilxin floating point cordic

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

u4223374

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10-06-2018 06:24 AM

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04-26-2015

Re: How to make various floating-point math functions? (which are missing from Xilinx IP Catalog)

@csehydrogen Can you define the requirements better?

The key questions are data types, required precision, required latency, and required throughput.

CORDIC can do very well on precision and throughput for a pretty small resource cost, but latency is pretty poor (it gets worse as precision increases).

Direct lookup tables can give you excellent throughput and latency, but resource cost scales with required precision. 12-bit input and 12-bit output will occupy a single 36K block RAM. 16-bit input and output will be 32 block RAMs. 32-bit input and output will require 16GB of space. And those nasty functions that have two 32-bit inputs (eg. atan2) increase that to 64EB of space... Still, if you just want to get asin(x) to within a degree or so, a simple lookup table may well be perfect.

I've done a bit of work with piecewise lookup tables, where a table entry contains a couple of coefficients for a series expansion around a specific point. If you get a value like 12987312, the first 10 bits of that (1100011000) select an entry in the table. The remaining bits (10101110110000) are then used in the series expansion to get a more accurate result than a direct lookup table or linear interpolation would achieve. There is a tradeoff here between number of coefficients in the lookup table, resources, and precision; but throughput and latency can be very good.

csehydrogen

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10-06-2018 07:18 AM

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Registered:
07-09-2018

Re: How to make various floating-point math functions? (which are missing from Xilinx IP Catalog)

I want IEEE 754 single-precision (possibly double-precision) floating-point functions, like in math.h of C language.

It should be synthesizable.

1. latency : I don't care much. even >100 cycles OK

2. resource : I don't care much, either.

3. frequency : I want around 200~300MHz.

4. throughput : It should be fully pipelined, i.e. 1 output / 1 cycle

Since I don't need super-optimized (like in academic papers or non-free IPs) functions, using HLS seems to be the closest solution to my situation.

Vivado HLS somehow supports all aformentioned functions.

+ I'm checking whether it can be made fully pipelined or not.

Thank you for all.

FPGA newbie http://github.com/csehydrogen