12-11-2019 01:57 AM - edited 12-11-2019 01:58 AM
I have one design for vivado 2018.3 and i want to check that design on spartan 6 family.
But spartan 6 family is not supported in vivado.
So, one option is migrate design from vivado 2018.3 to ISE 14.7.
Please guide me with proper solution.
12-11-2019 03:24 AM
As per AR#53109 , the Vivado tool supports only 7-series and above devices.
If you are planning to migrate the design from Vivado to ISE, the following user guide provides details on the areas which require updates as part of the migration process.
NOTE: Though the document is meant for ISE to Vivado migration, it still provides necessary information on the design changes to be performed in the ISE to Vivado migration
12-11-2019 03:44 AM - edited 12-11-2019 03:47 AM
Your going to have to provide a lot more detail,
first up what coding language are you using ,
if the code is all RTL, for instance VHDL, then relativly easy,
if in things like SystemVerilog of HLS, then much more re writting is going to be needed.
Once you have the coding language sorted, and your an expert in that language,
then the things to look out for are IP, and chip specific bits,
i.e. Spartan has different clock arrangements than 7 series.
The instantiated blocks from 7 series is unlikely to work in Spartan 6,
i.e if you have any memory blocks instantiated , then these are going to have to be re generated,
Any IP you have, you are going to have to check its spartan 6 compatible, Things like DDR or PCIe are unlikely to be,
One tip, having done a good few conversions like this,
Spend a good time making certain you have as good a self testing test bench of the old code before you chnage any of the code for the spartan 6,
You you will run the test bench multi times to check your design is compatable,