04-27-2010 08:59 AM
05-03-2010 07:36 AM
Do you need more informations to understand my pb? Does anyone know what happened?
Actually, I isolate the pb. Only the DDR2 can't be implemented with planAhead 11.5. I changed it for an SRAM and everything works but I still want to know why! Is it possible that the IP evolve in XPS and not in planAhead?
05-07-2010 12:08 AM
I suspect there are some UCFs of the IP cores in your design in the XPS project. But you only add the top level UCF to the PlanAhead project. Try to find the IP UCFs and copy the contents to the top level UCF.