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Observer jjmax87
Observer
1,013 Views
Registered: ‎03-14-2016

Parital Reconfiguration, GSR, GWE signals

Hello,

 

ug470 describes the Global Set Reset (GSR) and Global Write Enable (GWE) signals and their state during configuration. I have two questions that are not covered by the document and I could not find any further information about.

 

1. If Partial Reconfiguration is used, can both(!) of these signals be used for the respective partition without affecting the static design?

2. According to ug470, the point in time when GWE is asserted during the startup cycle can be set by some bitstream options. I could not find any information at which point this signal is de-asserted. Does this happen implicitly at the start of the configuration? Is this also the case for Partial Reconfiguration?

 

I'm currently (still :/) working on my master thesis and these topics are of certain interest for my showcase design. Simple answers would be enough, but documents that may be quoted would be even better.

 

Thank you very much,

Markus

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2 Replies
957 Views
Registered: ‎01-22-2015

Re: Parital Reconfiguration, GSR, GWE signals

    I could not find any information at which point this signal (GWE) is de-asserted.

 

You may find the comments by avrumw in <this post> to be helpful.

 

You'll also find a little information about the GSR in appendix-E of ug900, where it says:

   Although you can access the GSR net after configuration, avoid use of the GSR circuitry in place of a manual reset.

 

Mark

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Observer stephaneboyer
Observer
925 Views
Registered: ‎07-31-2011

Re: Parital Reconfiguration, GSR, GWE signals

Hi Markus,

 

For partial reconfiguration, you can control the GSR on the reconfigurable region.

Have a look at the RESET_AFTER_RECONFIG Pblock property in the UG909.

 

Best regards,

Stephane

 

 

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