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1,716 Views
Registered: ‎03-08-2018

Program Counter

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I am attempting to write a program counter in VHDL for my processor project. The register is 64 bits and is incremented by 1 instead of 4. Same goes for when branching. I am getting an error of "0 definitions of operator +" on line 51. I am not really sure how to fix it, it seems to be the only error I am encountering. Any help with the PC or fixing this error is appreciated, thank you.

 

 

 

entity programCounter is
    port ( CLK : in STD_LOGIC;
           SEL : in STD_LOGIC;
           signExtend : in STD_LOGIC_VECTOR(63 downto 0);
           Q : out STD_LOGIC_VECTOR(63 downto 0));
            
end programCounter;

architecture Behavioral of programCounter is

signal current : STD_LOGIC_VECTOR(63 downto 0) := X"0000000000000000";

begin
process(CLK)
begin
    if RISING_EDGE(CLK) then
        if SEL = '0' then
            current <= STD_LOGIC_VECTOR(unsigned(current) + 1);
        elsif SEL = '1' then
            current <= STD_LOGIC_VECTOR(unsigned(current) + signed(signExtend));
        end if;
    end if;
end process;
    Q <= current;

end Behavioral;

 

 

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Scholar jmcclusk
Scholar
2,256 Views
Registered: ‎02-24-2014

Re: Program Counter

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you can't mix signed and unsigned together with a "+" between them.  Addition/subtraction only works between identical types.  

 

entity programCounter is
    port ( CLK : in STD_LOGIC;
           SEL : in STD_LOGIC;
           signExtend : in STD_LOGIC_VECTOR(63 downto 0);
           Q : out STD_LOGIC_VECTOR(63 downto 0));
            
end programCounter;

architecture Behavioral of programCounter is

signal current : STD_LOGIC_VECTOR(63 downto 0) := X"0000000000000000";

begin
process(CLK)
begin
    if RISING_EDGE(CLK) then
        if SEL = '0' then
            current <= STD_LOGIC_VECTOR(unsigned(current) + 1);
        elsif SEL = '1' then
            current <= STD_LOGIC_VECTOR(signed(current) + signed(signExtend));
        end if;
    end if;
end process;
    Q <= current;

end Behaviora 

 

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3 Replies
Scholar jmcclusk
Scholar
2,257 Views
Registered: ‎02-24-2014

Re: Program Counter

Jump to solution

you can't mix signed and unsigned together with a "+" between them.  Addition/subtraction only works between identical types.  

 

entity programCounter is
    port ( CLK : in STD_LOGIC;
           SEL : in STD_LOGIC;
           signExtend : in STD_LOGIC_VECTOR(63 downto 0);
           Q : out STD_LOGIC_VECTOR(63 downto 0));
            
end programCounter;

architecture Behavioral of programCounter is

signal current : STD_LOGIC_VECTOR(63 downto 0) := X"0000000000000000";

begin
process(CLK)
begin
    if RISING_EDGE(CLK) then
        if SEL = '0' then
            current <= STD_LOGIC_VECTOR(unsigned(current) + 1);
        elsif SEL = '1' then
            current <= STD_LOGIC_VECTOR(signed(current) + signed(signExtend));
        end if;
    end if;
end process;
    Q <= current;

end Behaviora 

 

Don't forget to close a thread when possible by accepting a post as a solution.

View solution in original post

1,684 Views
Registered: ‎03-08-2018

Re: Program Counter

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Makes sense, can't believe I didn't realize that. Thanks

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Scholar jmcclusk
Scholar
1,651 Views
Registered: ‎02-24-2014

Re: Program Counter

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Now close the thread by marking the post "Accept as solution".    Keep asking questions!

Don't forget to close a thread when possible by accepting a post as a solution.
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