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Voyager
Voyager
7,735 Views
Registered: ‎04-21-2014

UG946 Hierarchical Design Tutorial

Hierarchical Design Tutorial UG946 is mentioned in several resources, I have, for example, in UG905, however I cannot find it either in DocNav nor online, where it says: 

 

"Vivado Design Suite Tutorial: Hierarchical Design (UG946). Please contact Xilinx support for information on accessing this document." 

 

I thought I'd use the community forums that are monitored by Xilinx, so that my difficulites can also help others.

 

Thanks in advance for whomever responds with instructions on how we can obtain this tutorial.

 

 

***Many of us who help you are just FPGA enthusiasts, and not Xilinx employees. If you receive help, and give kudos (star), you're likely to continue receiving help in the future. If you get a solution, please mark it as a solution.***
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11 Replies
Moderator
Moderator
7,711 Views
Registered: ‎11-09-2015

Re: UG946 Hierarchical Design Tutorial

Hi,

 

You have to contact technical support to get this document. You can still find a previous version of this document:

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_2/ug946-vivado-hierarchical-design-tutorial.pdf

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Newbie a06022003
Newbie
1,103 Views
Registered: ‎10-08-2018

Re: UG946 Hierarchical Design Tutorial

Hi,

Is there anything left for the UG946-Hierarchical Design files which concerning about the context in ug946 like design.tcl?

linking to the webside, I can not find the file for the tutorial.

thank you 

0 Kudos
586 Views
Registered: ‎06-05-2018

Re: UG946 Hierarchical Design Tutorial

Hi,

Did you find this file ?

YD
0 Kudos
576 Views
Registered: ‎06-05-2018

Re: UG946 Hierarchical Design Tutorial

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Contributor
Contributor
537 Views
Registered: ‎05-17-2018

Re: UG946 Hierarchical Design Tutorial

>>The file you have requested is not available. 

How can I obtain access to UG946?

 

thanks

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Xilinx Employee
Xilinx Employee
531 Views
Registered: ‎05-03-2018

Re: UG946 Hierarchical Design Tutorial

Hi @fvandesa ,


May I know the device family you are using? The UG946 is recommended only for 7-series. We strongly recommend Top-Down flow mentioned in UG909 and UG947 for HD. This flow basically allows you to out-of-context synthesis of individual modules, but in-context implementation with top design. This is to leverage many other features like Expanded Routing, proper PPLOCs placement in context of whole design and so on. I would recommend leveraging flow mentioned in UG947 tutorial for HD flows. Please let me know if there is any other strong reason you have to continue to use bottom-up approach with out-of-context implementation.

Thanks,
Goutham

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Highlighted
Historian
Historian
528 Views
Registered: ‎01-23-2009

Re: UG946 Hierarchical Design Tutorial

How can I obtain access to UG946?

I think the big question is "Do you want to obtain this file".

The Hierarchical Design Methodology was a methodology that was introduced a number of years after Vivado was first introduced. While it "mostly worked", there were still some rough edges that needed to be worked out...

Unfortunately, the methodology doesn't really work with UltraScale - the new clock architecture of UltraScale invalidated one of the key assumptions in the Hierarchical Design concept, and, rather than update it to fix this problem, the methodology was essentially scrapped. It is (probably) for this reason that the user guide access was changed to "contact technical support"  - they are discouraging anyone from using this methodology (particularly if they haven't already used it).

The good news is that some of the capabilities that were enabled by the Hierarchical Design methodology can (at least somewhat) still be obtained using the Partial Reconfiguration flow - you can use this even if you are not actually planning to use partial reconfiguration...

Avrum

Contributor
Contributor
496 Views
Registered: ‎05-17-2018

Re: UG946 Hierarchical Design Tutorial

>>May I know the device family you are using?

Ultrascale+

>>The UG946 is recommended only for 7-series. We strongly recommend Top-Down flow mentioned in UG909 and UG947 for HD. This flow basically allows you to out-of-context synthesis of individual modules, but in-context implementation with top design. This is to leverage many other features like Expanded Routing, proper PPLOCs placement in context of whole design and so on. I would recommend leveraging flow mentioned in UG947 tutorial for HD flows.

I was referred to  UG946 from UG905 without disclaimer (7-series only)

>>Please let me know if there is any other strong reason you have to continue to use bottom-up approach with out-of-context implementation.

My reasons are the same as the ones used in UG946 :-)

 

thanks for the reply, I will read UG909 & UG947 .

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Contributor
Contributor
491 Views
Registered: ‎05-17-2018

Re: UG946 Hierarchical Design Tutorial

My reasons are identical as mentioned in G905

=> G905 (v2018.3) December 5, 2018

this document refers to UG946 without (family) disclaimer.

 

good to know this is obsolete. I avoided "partial reconfiguration" documentation because partial reconfiguration is beyond my intentions for now.

 

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Xilinx Employee
Xilinx Employee
484 Views
Registered: ‎05-03-2018

Re: UG946 Hierarchical Design Tutorial

Hi @fvandesa , Thank you. It is actually mentiond in page-5 of UG905.

"IMPORTANT: This document applies only to 7 series devices, not UltraScale™ or UltraScale+™ devices.
For more information about applications of hierarchical design in UltraScale and UltraScale+ devices,
see Vivado Design Suite User Guide: Partial Reconfiguration (UG909)[Ref 6]."

Pointer to UG947 is given in UG909.

In short, UG909 and UG947 are the way to go for US/US+. Please let us know if you encounter any issues.

Thanks,
Goutham

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Contributor
Contributor
480 Views
Registered: ‎05-17-2018

Re: UG946 Hierarchical Design Tutorial

ok, I missed that.

thank you!

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