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Registered: ‎08-23-2011

Reg: ISE 14.1 Xpower warning - one or more clocks not defined ...



i have a virtex6 design which has a PLL. i/p to PLL is 100M, o/p of PLL is 20M, 40M and 80M clocks


im constraining the i/p to the PLL in my UCF file to 100M and implementing the design using xilinx 14.1

the design gets implemented successfully (all constraints met).


however when i run the xpower utility, i get  a warning saying - one or more clocks have not been defined and so the power will be inaccurate.


also, the power for this design is less than the power for a slower design (with 10M, 20M, 40M) clocks from the PLL (which doesnt seem possible). 


also, in what case would some of the sub modules of the design show 0 power consumption? the modules work in bit file.


since im already defining the i/p clock constraint to the PLL (and the o/p clock constraint is automatically inferred in case of PLLs by the xilinx tool), which other clock freq do i need to specify? how can i get rid of this warning and get a more accurate power estimate?


any tips?



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