UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor starting
Visitor
158 Views
Registered: ‎08-10-2018

Supported features of Xilinx Virtual Cable (XVC)

Dear Xilinx team and forum users,
we want to use the XVC interface as described in XAPP1251 with a Zynq and searching through the forum i found some reports of not working functionality.
Some threads suggest that there are, e.g.

I've read the application note, but find the information not very clear, especially when reading the XVC webpage entry and forum posts.
To not run into issues late into the design i would like to clarify whether it is supported to use a Zynq based board with Vivado 2017.4 to perform the following actions over XVC:

Load bitstream into configured/unconfigured Artix/Kintex/Spartan-7 that is
        ... the only element of the JTAG chain                                                      (1)
        ... element of a JTAG chain consisting of two or more 7-series FPGAs   (2)

Load bitstream via indirect programming into standard/dual/quad SPI flash connected to Artix/Kintex/Spartan-7 that is
        ... the only element of the JTAG chain                                                      (3)
        ... element of a JTAG chain consisting of two or more 7-series FPGAs   (4)

Debug Artix/Kintex/Spartan-7 using ILA with
        ... single element chain                                                                             (5)
        ... chain of multiple 7-series FPGAs                                                         (6)

Same Questions but for older FPGA generations like Spartan 6                     (7)              

I see no technical reasons why there should be a difference to JTAG over USB as XVC is implementating JTAG on a very low level (which i like).
Aside from software bugs the only other technical reason might be timing issues, but JTAG isn't time sensitive on a "frame" basis and from my experience USB can be worse than ethernet.


Could somebody who uses one of these features share some of his experiences?


Thanks in advance.

0 Kudos