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Visitor chesh
Visitor
2,752 Views
Registered: ‎01-17-2016

Vivado makes AXI4-Lite to AXI4-Memory map if I use an additional Interconnect

Hi,

 

If I use a AXI Interconnect to connect a peripherals with an AXI4-Lite connection it makes the connection between the AXI-interconnect of the Zynq and AXI Interconnect of my peripherals an AXI4-Memory mapped connection. This is shown in the screenshot below M12 AXI (blue line = AXI4-Memory Map Connection)

If I connect an AXI4-Lite peripheral directly to our AXI Interconnect of the Zynq it is an AXI4-Lite connection (Green line). 

 

This requires more resources (~4% of our design). 

 

An option is connect all my AXI4-Lite peripherals to directly to the Zynq AXI Interconnect but this becomes a mess. I would like to keep the block design hierarchical and use AXI Interconnect within sub blocks to connect several AXI4-Interconnect.

 

Is there any way to force the connection between 2 AXI-Interconnects to be AXI4-Lite?

 

 

axi4lite.png

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1 Reply
Observer michellelloyd
Observer
1,221 Views
Registered: ‎08-31-2017

Re: Vivado makes AXI4-Lite to AXI4-Memory map if I use an additional Interconnect

Hi @chesh,

Did you ever figure this out?

 

Thanks,

@michellelloyd

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