Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.

- Community Forums
- :
- Blogs
- :
- Design and Debug Techniques Blog
- :
- Using a Reloadable FIR IP in System Generator

- Subscribe to RSS Feed
- Mark as New
- Mark as Read
- Bookmark
- Subscribe
- Email to a Friend
- Printer Friendly Page
- Report Inappropriate Content

04-29-2020
11:56 PM

This blog entry guides you through how to use the FIR filter feature of the Finite Impulse Response (FIR) compiler IP as a reloadable filter.

Prerequisites:

- Basic understand of MATLAB.
- Basic understanding of Sysgen blocks.
- Awareness of Filter design.
- Vivado 2018.3 and Matlab 2018a installed.

Below are the building blocks of the design:

**1) Signal Generator**

Signal Generator is used to generate the input signal for the FIR IP.

Signal generator can generate two types of signals:

- Sin tones of 1 Mhz and 16Mhz sampled at 40Mhz which are added together.
- A random signal over the complete frequency band.

The selection of input signal is based on a manual switch.

**2)** **Reloadable Port**

The timing diagram of the reloadable port is shown below**:**

**Note:** The reload channel handles the coefficients as "UFix" type.

The reload coefficients needs to be provided as Unsigned fix type and the FIR compiler will treat them as per the "Coefficient type" in the FIR GUI.

For example if '-7' is the coefficient provided in the reload channel to the FIR, and the FIR has the Coefficient type set as Fix_16_0, then the reload coefficient value of -7 in Ufix_16_0 format will be "65529".

**3) Filter Specification**

This design uses two coefficient sets:

a) Low Pass Filter (LPF) with the specifications shown below.

b) High Pass Filter (HPF) with the specifications shown below.

Initially the LPF coefficients are added to FIR, then the HPF coefficients are reloaded.

**Notes:**

1) Make sure that the filter coefficients are symmetric for both LPF and HPF.

It is possible for the HPF to have an asymmetric coefficient and the LPF to have a symmetric one.

In that scenario if we use the LPF in the FIR compiler with the inferred option, then we will get incorrect results.

If you have different kinds of symmetry, then use the 'non-symmetric' option in FIR.

2) The order of both filters should be the same.

To run the design, please follow the steps below:

- Download the design.
- Invoke System Generator by selecting Start > All Programs > Xilinx Design Tools > Vivado 2018.3 >System Generator > System Generator 2018.3
- Change the working directory to the location where Sysgen models are downloaded.

- Open
*FIR_reload.slx*.

- Click on FIR IP and run the following command in the MATLAB command window.

coeff2=xlfda_numerator('HPF');

Num = (xlGetReOrderedCoeff(coeff2,'coeff', gcbh))';

The command **xlfda_numerator('HPF')** is used to generate the coefficient for the HPF filter.

The command **(xlGetReOrderedCoeff(coeff2,'coeff', gcbh))' **is used to extract the coefficient which is given as input to the FIR Filter.

- Run the design and you should now observe the following:

**Input signal: sin tone **

**Output signal:**

** **

**Input signal: Random **

** **

**Output signal:**

** **

** **

2 Comments

You must be a registered user to add a comment. If you've already registered, sign in. Otherwise, register and sign in.

Latest Articles

- Debugging Versal ACAP CPM Mode for PCI Express Des...
- UltraScale/UltraScale+ MIG DDR3/DDR4 hardware fail...
- Versal Embedded Memory/FIFO Generator and XPM_MEMO...
- How to handle more that 16 interrupts on a Versal ...
- AXI DMA Linux user space application on Zynq MPSoC...
- Vivado/Vitis 2020.2 - Zynq MPSoC Hello World to Ve...
- AI Engine Series 8 - Introduction to the Run-Time ...
- AXI DMA standalone driver test on a VCK190 board
- Understanding the new PL PCIE IP Generation flow f...
- AI Engine Series 7 - Visualizing AI Engine events ...