This blog provides a list of videos showcasing the tutorials in (UG1209). The videos have been created using Vivado® Design Suite version 2019.1 and the Xilinx Software Development Kit (SDK). The examples are targeted for the Zynq® UltraScale+™ MPSoC ZCU102 Rev1 evaluation board.
Video-1 shows how to run an application using the ZCU102. While most of the videos run the applications using QEMU, the applications can also be run on the ZCU102 by following Video 1.
The videos are broken down into the corresponding chapters from (UG1209).
Chapter 2, "Zynq UltraScale+ MPSoC Processing System Configuration", covers the creation of a system with the Zynq UltraScale+ MPSoC Processing System (PS) and running a simple “Hello World” application on the ARM® Cortex®-A53 and Cortex-R5 processors. This chapter is an introduction to the hardware and software tools using a simple design as the example.
Chapter 3, "Build Software for PS Subsystems", describes the steps to configure and build software for processing blocks in the processing system, including the application processing unit (APU), real-time processing unit (RPU) and platform management unit (PMU).
Chapter 4, "Debugging with SDK" introduces debugging software using the debug features of the Xilinx Software Development Kit (SDK). This chapter uses the previous design and runs the software bare metal (without an OS) to show how to debug. This chapter also lists Debug configurations for Zynq UltraScale+ MPSoC.
Chapter 5, "Boot and Configuration", shows integration of components to configure and create Boot images for a Zynq UltraScale+ system. The purpose of this chapter is to understand how to integrate and load Boot loaders.
Chapter 6, "System Design Examples", highlights how you can use the software blocks you configured in Chapter 3 to create a Zynq UltraScale+ system.
Chapter 2: Zynq UltraScale+ MPSoC Processing System Configuration
Video 1 – Bare metal design creation and running the “Hello World” application from ARM Cortex-A53
This video covers all of chapter 2. This includes Zynq UltraScale+ MPSoC system configuration, creating a new embedded project with Zynq UltraScale+ MPSoC, creating an embedded processor project, managing the Zynq UltraScale+ Processing System in Vivado, validating the design and connection of ports, exporting the hardware to SDK and running the “Hello World” application from the ARM Cortex-A53.
Chapter 3: Build Software for PS Subsystems
Video 2 – FSBL on A53
This video shows how to create a First Stage Boot Loader (FSBL) for the ARM Cortex A53-Based APU and run it using QEMU.
Video 3 – FSBL on R5
This video shows how to create a First Stage Boot Loader for R5.
Video 4 – PMU Firmware
This video shows how to create the PMU firmware for the MicroBlaze CPU and run it using QEMU.
Video 5 – Bare Metal A53
This video shows how to create a bare metal application for the Arm Cortex-A53 based APU and how to modify the source code to display a different message in the console indicating that it is running on the A53 processor. This will be run using QEMU.
Video 6 – Bare Metal R5
This video shows how to modify the linker scrip and BSP settings, covering how to create a bare metal application for the ARM Cortex-R5 based RPU. The R5 application uses sources from the design sources that configure the UART interrupt and set the processor to WFI mode.
Video 7 – Linux Image
This video shows how to create a Linux Image to boot using SD-Boot mode. The PetaLinux project is created using the ZCU102 BSP and configured using the exported hardware description from Vivado. This will be run using QEMU.
Video 8 – Linux Image for QPSI
This video shows how to create a Linux Image using PetaLinux configured for QSPI flashing. This will be run using QEMU.
Chapter 4: Debugging with SDK
Video 9 – Debugging A53 application with SDK
This video shows how to debug an application running on the A53 processor on QEMU.
Video 10 – Debugging an R5 application with XSCT
This video shows how to create an ARM machine on QEMU, connecting the SDK to that machine through a port, downloading the application to the machine and demonstrates the flow for debugging the application.
Chapter 5: Boot and Configuration
Video 11 – Boot image creation for SD
This video shows how to configure boot partitions, create the boot image using the SDK, and run the image on QEMU for the SD boot flow.
Video 12 – SD-Boot mode ZCU102
This video shows how to boot the image created in video 11 onto the ZCU102 via SD-Boot mode
Video 13 – Boot image creation for QSPI
This video shows how to configure the boot partitions and create a boot image using the SDK to boot via QSPI.
Video 14 – QSPI-Boot mode ZCU102
This video shows how to boot the image created in video 13 onto the ZCU102 using QSPI-Boot mode.
Video 15 – Boot image creation for USB
This video shows how to create and configure the FSBL for USB boot mode.
Chapter 6: System Design Examples
Video 16 – Using GPIOs, Timers and Interrupts
This video covers how to modify the Vivado project to include and configure the GPIO and Timer block, exporting the design with bitstream, configuring and building the PetaLinux project with the new hardware description, creating a new application for the R5 importing source from the design sources, creating a Linux application and creating a boot image for the SD boot flow.
Video 17 – Graphics and Display Port based Sub-System
This video covers how to reconfigure the PS block in Vivado for display port, exporting the design with the bitstream, configuring the PetaLinux project with the new hardware description, building the Mali OpenGLES application, re-configuring the root file system to enable FPU libraries, other packages and the graphics application and building the boot images.
Video 18 – Graphics and Display Port SD boot ZCU102
This video shows how to boot the files created in video 17 via SD-Boot mode and displaying the graphics via the display port connector.