Design and Debug Techniques Blog

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Design and Debug Techniques Blog

florentw
Moderator
Moderator

In the Versal AI Engine 2 article, we noticed a line in the graph file defining the run-time ratio parameter for each kernel instance.

In this article we will see how this parameter can impact the resource utilization and the performances of the AI Engine application.

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abommera
Xilinx Employee
Xilinx Employee

This Versal™ example design will show how to run AXI DMA standalone application example on a VCK190 evaluation board and is intended to demonstrate use of the AXI DMA standalone driver which is available as part of Vivado and Vitis™.

In this blog, we will discuss how to run an AXI DMA bare-metal application to make use of DMA standalone driver in the 2019.2 release. To quick test with design files in the 2020.2 version, refer to this AXI DMA GitHub Example.

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