Design and Debug Techniques Blog

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Design and Debug Techniques Blog

stephenm
Moderator
Moderator

In this entry in the PetaLinux Image Debug Series we will discuss how we can debug the Zynq® UltraScale™ Linux Kernel images in Vitis™.

We will also cover how to use PetaLinux 2020.1 to create the Linux images for a Zynq UltraScale device. For all entries in this series, see here.

 

 

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nishak
Moderator
Moderator

The Device Tree Generator (DTG) is a Tcl based utility that uses the HSI API to extract the hardware information from the XSA file to construct a custom device tree. The DTG utility is used in PetaLinux and Yocto. However, debugging DTG issues in PetaLinux can be cumbersome.

In this entry in the PetaLinux Image Debug Series we will discuss how we can isolate the DTG from PetaLinux, how to build the DTS files, how to navigate the DTG source files and how to debug a typical DTG issue. For all entries in this series, see here.

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stephenm
Moderator
Moderator

In this blog entry we will discuss how we can debug the Zynq UltraScale device boot images in Vitis. These boot images include the ARM Trusted Firmware (ATF) and U-boot.

Boot image debug is a vital part of any custom board bring up, and hopefully this blog will allow users to fully debug a custom board  boot image. Even if you are using a development board, this blog will provide a useful insight into how the boot images work on Zynq UltraScale. For all entries in this series, see here.

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