Design and Debug Techniques Blog

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Design and Debug Techniques Blog


In Zynq UltraScale+ boards such as the Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit, the QSPI Flash is connected to the PS portion of the device and does not have a direct physical connection to the PL side.

In such configurations, it is not possible to write a bitstream (.mcs file) directly to the flash via the Hardware Manager. In fact, when attempting to configure the bitstream to be loaded via QSPI, Vivado will only make the Boot via JTAG option available, as it knows that there is no flash available in the PL.

In order to configure and boot such devices via Flash, the PS portion of the device must be booted (even if it is not desired or will not be used in the actual project), in order to allow the bitstream to be transmitted from the Flash to the PS and to reach the PL through the MIO pins.

The process consists of creating a new Zynq MPSoC project in Vivado Block Design (or adding this block to an existing design) in order to include the PS in the project, and using the SDK to create a First Stage Boot Loader (FSBL) for the PS, an optional PS application, and finally creating the flash image which will contain the boot files for both the PS and PL.



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