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Observer shaikanarek
Observer
233 Views
Registered: ‎07-29-2018

I2C in FSBL stage

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Hello

I have a custom board (MPSOC 9EG , Vivado 2018.3 ) with SI5338 clocking the PS GTR (for GEM &USB3.0) , I noticed that the PSU init fails if clocks are not valid. (we temporary commented out the line at fsbl that looks for these clocks, or by removing the GEM &USB3.0 at zynq).

can you please provide an example for i2c at FSBL stage  ? where should it be placed (hooks?)?

Thank you!

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Moderator
Moderator
170 Views
Registered: ‎09-12-2007

Re: I2C in FSBL stage

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Have a look at the i2c_access.c in the lwip echo server that is used to config the clocks for zcu10x boards

 

https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/lwip_echo_server/src

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Moderator
Moderator
171 Views
Registered: ‎09-12-2007

Re: I2C in FSBL stage

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Have a look at the i2c_access.c in the lwip echo server that is used to config the clocks for zcu10x boards

 

https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/lwip_echo_server/src

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