01-12-2018 11:25 AM
I am designing a power sequencing logic for a Zynq based board.
My question is about the answer A3 on this page. I would like to know if the last word, asserted, could be a typo and the poster intention was to mean de-asserted. It seems to me that PS_SRST_B state is not relevant while PS_POR_B is asserted.
The deassertion (pulling high) order is pretty clear to me: PS_SRST_B must be deasserted before PS_POR_B and the current logic warrants that
It is the assertion order that I am concerned with. If PS_SRST_B really must be asserted before PS_POR_B, then I will have to add extra circuitry, which I would like to avoid unless really necessary.
Thanks in advance.
01-12-2018 01:33 PM
There is no reason to assert anything. As the device itself detects when power is valid, and starts to configure, the only reason you would want to assert the POR_B would be you wish to stop everything, and start over (as if power was cycled off, then back on).
The only reason to assert the processor reset signal is because you wish to stop the processors, and start over. In most embedded systems, these signal might exist on hidden pushbuttons for use by technicians when repairing or troubkle shooting a system. Neither signal is intended to be used in a practical system, as the system knows when to dtart when power is good, and software shouldn't crash and need to be restarted.
Note that POR_b has precedence over a soft reset: cycling power drops everything, and restarts everything. Processor reset puts the processors back into a known state only after power is good, and everything is up and running.
01-13-2018 01:28 AM
Thank you for your prompt response. It solves my problem.
I am still curious about the answer to my question though (about that last word being a typo).
02-23-2018 09:54 AM
Q3. Does this mean that PS_SRST_B cannot be asserted when PS_POR_B is asserted?
A3. No, PS_SRST_B can be asserted at the same time as PS_POR_B but PS_POR_B must be the last signal that is de-asserted.