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1,809 Views
Registered: ‎02-08-2018

Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Hi,

 

we use the XCZU19eg-FFVC1760 device on a custom board with a QSPI dual parallel flash as boot source.

 

At startup, when the flash is empty, I can program the flash (via Vivado or SDK) when the boot mode is QSPI32 (0x2).

After a power cycle the system boots successfully. But when I want to reprogram the flash I get no access in QSPI32 boot mode (see below). I must change the boot mode to JTAG (0x0) for a valid reprogramming.

 

Is it possible to reprogram the flash via Vivado or SDK when the boot mode is QSPI32? Is it possible to change the boot mode programmatically? I found  a XSCT snippet to change the boot mode register:

 

targets -set -nocase -filter {name =~ "*PSU*"}
stop
mwr  0xff5e0200 0x0100 
rst -system

But it don't works!

 

 

-----------------------------------------------------------------------------------

****** Xilinx Program Flash
****** Program Flash v2018.2.1 (64-bit)
  **** SW Build 2288692 on Thu Jul 26 18:24:02 MDT 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


Connected to hw_server @ TCP:127.0.0.1:3121
Available targets and devices:
Target 0 : jsn-DLC10-0000128f454d01
    Device 0: jsn-DLC10-0000128f454d01-14758093-0

Retrieving Flash info...

Initialization done, programming the memory
===== mrd->addr=0xFF5E0204, data=0x00000222 =====
BOOT_MODE REG = 0x0222
WARNING: [Xicom 50-100] The current boot mode is QSPI32.
If flash programming fails, configure device for JTAG boot mode and try again.
Downloading FSBL...
Running FSBL...
Finished running FSBL.
Problem in running uboot
Flash programming initialization failed.

ERROR: Flash Operation Failed

-----------------------------------------------------------------------------------

 

Regards, Christian

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9 Replies
Visitor bhunt
Visitor
1,788 Views
Registered: ‎10-08-2008

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

After bootup, the SPI FLASH themselves are probably operating in QUAD mode. In this case, if you try to program the flash using the JTAG bootloader method, the core will not be able to communicate with the flash, since the bootloader starts in x1 mode and expects the flash also to be in x1 mode. 

 

I'm guessing that the mwr access you showed below was intended to reset the flash, but that would only work in that one specific setting. 

 

My suggestion is to either 1) disable the board from booting, maybe by holding a system reset active, and then connect via JTAG. Of course, this only works if you can reset the system without holding down INIT_B or PROG_B. Optionally you could reset the SPI flash if it has a reset pin.

 

Or 2) Figure out how to write a reset to each flash device, perhaps using a special design. For example, I've had a (single) quadSPI flash design, which runs in QUAD mode. To reprogram the flash I used a small SPI-writer design to send the SPI reset command. To reset the micron n25 I wrote to the WRITE ENHANCED VOLATILE CONFIGURATION REGISTER.  Writing 0xCF to that register would reset the micron flash to x1 mode. After that operation, I could use the JTAG indirect programming. 

 

Hope this helps,

BryanH

 

1,750 Views
Registered: ‎06-30-2017

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Hello,

 

did anyone found a solution for this problem? I am working on Trenz Te0782 board. On this Board a CPLD is used to set the boot mode. Thus by default the boot mode is QSPI. I will avoid to program the CPLD to be able to flash a new firmware version and reprogram the CPLD again. 

 

Until yet I was working with Vivado 2016.3. With this version it was absolut no Problem. Now I updated to Vivado 2018.2 and I am no even able to program the flash... 

 

Thank you,

Regards, Stephan

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Xilinx Employee
Xilinx Employee
1,743 Views
Registered: ‎10-11-2011

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

BTW: JTAG boot mode is still the recommended mode for flash programming BUT your procedure should work.

This is what I used:

 

"

connect
targets -set -filter {name =~ "PSU"}
mwr 0xffca0038 0x1FF
targets -set -filter {name =~ "MicroBlaze PMU"}
# force jtag mode
mwr -force 0xff5e0200 0x0100    
# reset         
targets -set -filter {name =~ "PS TAP"}
rst -srst

"

 

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1,720 Views
Registered: ‎06-30-2017

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Hello denist,

 

thank our for you fast response! Is this also possible on a Zynq? The TE0782 board is based on the Zynq7100.

Regards, Stephan

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Xilinx Employee
Xilinx Employee
1,677 Views
Registered: ‎10-11-2011

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

No, sorry. there's no option to do this in zynq-7000. You should really switch boot mode pins.

Maybe simply shorting the 1 to GND when releasing POR_B.

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Visitor jhartfiel
Visitor
1,638 Views
Registered: ‎05-29-2018

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Hi Stephan and Denist,

 

this limitation was introduced with Vivado 2017.3:

On older Vivado versions it was not needed. JTAG mode for QSPI programming was only a recommendation for older Vivado versions, because some applications on Zynq can stop JTAG access. Normally it's not a problem to write Flash if the boot mode is set to QSPI.

The problem on this changes from Xilinx is now, that default FSBL try to find a Boot.bin on QSPI. And if the flash is empty, it will stop on an error state, before QSPI will be programmed by Xilinx micro Uboot.

 

So for TE0782 you has 3 options:

1. Use older Vivado Version (only temporary a workaround and not a good solution for the future)

2. Change TE0782 CPLD firmware to JTAG (but this is only a fallback for this module and not good to handle for flash programming only)

3. Modify a second FSBL for Vivado/SDK GUI only (I would recommend this way, because it's very easy)

 

So for option 3 with second FSBL do following:

Use Boot.bin with "normal" FSBL and create a second modified FSBL for the Vivado/SDK GUI only.
On the second FSBL, you must only overwrite boot mode pin readback on main.c with JTAG Mode, see:


   /*
    * Read bootmode register
    */
   BootModeRegister = Xil_In32(BOOT_MODE_REG);
   BootModeRegister &= BOOT_MODES_MASK;
 
  /* Add this modification: */
   BootModeRegister = JTAG_MODE;
 

 

Optional you can also disable DDR initialisation, because it's not needed for QSPI programming.

 

Trenz Electronic will provide this special FSBL for QSPI programming on all 2017.4 and newer reference design for module with Zynq and ZynqMP devices.

 

Best regards

John

 

Highlighted
Explorer
Explorer
603 Views
Registered: ‎11-28-2011

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Option 3 seemed to have work for me here with a Z7045 device. Can a Xilinx employee or someone experienced with many iterations of programming devices tell me if the modified fsbl_special.elf that is pointed to by the tools can be used on different devices or is it device specific? I was hoping since it's not the fsbl.elf in the .bin file that was modified and only a fsbl that is pointed to for programming, that this fsbl_special.elf can be used generically. 

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Moderator
Moderator
593 Views
Registered: ‎03-19-2014

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

The FSBL used to program does not need to match the FSBL in the boot.bin.   It does need to match the hardware being programmed.   This FSBL is used to initialize u-Boot fdor programming the FLASH device, so it needs to be built from an hdf that represents the Zynq device.    

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Visitor jhartfiel
Visitor
564 Views
Registered: ‎05-29-2018

Re: Vivado 2018.2 -> unable to reprogram QSPI via JTAG in QSPI32 boot mode

Hi polyee13,

whats glena told you is correct. Every Zynq board has other PS configuration, which will be imported with the generated HDF from your vivado project. So in general do never use files from different boards. Also do not used files from different Vivado/Petalinux versions thogether.

What you can do to have this special FSBL for QSPI programming a little bit general:

First way (I would more recommend this way): is to create your own FSBL Template for QSPI programming, which can be loaded as local repository into your SDK project (See reference designs  for Vivado 2017.4 or newer of the Trenz Electronic Zynq modules --> you can also copy this template from on of these projects (named "zynq_fsbl_flash")). But you must create a new template for every new Vivado Version, so that all new Xilinx changes on FSBL are include.

Second way (I never tried out and here also some restrictions): Create Vivado Project with PS only. Configure QSPI, Zynq REF-CLK and MIO Bank Voltage link it is set on your board (see board schematics) and disable the default activated PS-PL AXI interface. Create HDF and modify FSBL   for QSPI programming (with the fix JTAG Boot Mode and DDR disabled). I think this ELF file should work on all Boards with the same QSPI connection, the same Zynq REF-CLK and the same MIO Bank Voltages. And the same like on the first way, create one for every new vivado version.

br

John

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